Arteris Revolutionizes Semiconductor Design with FlexGen – Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results

Rhea-AI Summary

Arteris (Nasdaq: AIP) has introduced FlexGen, a revolutionary smart network-on-chip interconnect IP that significantly enhances semiconductor design efficiency. The technology delivers up to 10x productivity boost in chip development, reducing design iterations from weeks to days.

Key technical achievements include up to 30% reduction in wire length for lower power consumption and up to 10% reduction in latency for improved SoC and chiplet performance. FlexGen's AI-driven automation reduces manual adjustments by over 90%, enabling optimized NoC topology creation in hours instead of days.

Dream Chip Technologies has successfully implemented FlexGen in their Zukimo 1.1 automotive ADAS SoC, reporting significant improvements in design efficiency and quality. AMD has also expressed interest in the technology for their next-generation product innovation.

Positive

• Achieves 10x acceleration in chip design productivity
• Reduces wire length by 30%, improving power efficiency
• Decreases latency by 10% in SoC and chiplet designs
• Cuts manual adjustments by 90% through AI automation
• Successfully implemented by Dream Chip Technologies in production
• Gained interest from major industry player AMD

Negative

• None.

Highlights:

• Productivity Boost: Accelerates chip design by up to 10x, shortening and reducing iterations from weeks to days for greater efficiency.
• Expert-Level Results: Enhances engineering efficiency by 3x while delivering expert-quality results with optimized routing and reduced congestion.
• Wire Reduction Performance: AI-driven heuristics reduce wire length by up to 30%, improving chip or chiplet power efficiency.
  

CAMPBELL, Calif., Feb. 18, 2025 (GLOBE NEWSWIRE) -- Arteris, Inc. (Nasdaq: AIP), a leading provider of system IP which accelerates system-on-chip (SoC) creation, today introduced FlexGen, a revolutionary, smart network-on-chip (NoC) interconnect IP. FlexGen from Arteris dramatically accelerates chip development while optimizing performance efficiency, addressing the rising demand for faster, more sustainable innovation in automotive, datacenter, consumer electronics, communications and industrial applications. With up to a 10x productivity boost, FlexGen slashes design iterations, significantly reducing the time required to develop cutting-edge chips. FlexGen also achieves up to a 30% reduction in wire length to lower power use, and up to 10% reduction in latency that results in improved performance in SoC and chiplet designs.

FlexGen builds upon the silicon-proven and physically aware FlexNoC 5 NoC IP technology and component library to automate the creation of high-performance network-on-chip (NoC) designs. Supported by AI-driven automation, FlexGen reduces manual adjustments by over 90%, enabling the generation of optimized NoC topologies in hours instead of days. This significantly accelerates development while maintaining the quality achieved through manual methods. These advancements are critical as the industry scales to meet the demands of advanced technologies like artificial intelligence, autonomous driving and cloud computing.

Dream Chip Technologies, a leader in automotive AI used for advanced driver assistance systems (ADAS), experienced the transformative potential of FlexGen. Using the technology, they reduced design iterations from weeks to days, enabling rapid experimentation and faster development.

“We have used FlexGen on our Zukimo 1.1 automotive ADAS SoC with excellent results. FlexGen’s automated NoC IP generation allows us to create floorplan adaptive topologies with complex automotive traffic requirements within minutes, allowing for rapid experimentation to find design sweet spots, and to respond quickly to floorplan changes with almost push-button timing closure. Our engineers are expert FlexNoC users, and we have been able to obtain superior power, performance and area (PPA) with shorter wire length and lower latencies using fewer resources with Arteris’ latest smart NoC IP product,” said Jens Benndorf, general manager of Dream Chip Technologies. “We plan to use FlexGen in production to deliver SoCs faster and with higher quality.”

By streamlining chip design workflows and automating key processes, FlexGen enables companies to tackle the growing complexity of semiconductor design with fewer resources, paving the way for innovations in AI, 5G, and industrial IoT.

“High-performance computing and AI SoCs have become very complex, creating expanding requirements to meet the energy efficiency targets and project schedules,” said John Rayfield, corporate vice president of AI Silicon at AMD. “Given our experience of working closely with Arteris in the past, we are excited about the smart NoC FlexGen technology and its ability to support our next-generation product innovation.”

“FlexGen is the culmination of years of ground-breaking innovation to boost productivity while improving quality of results in order to overcome the exponential design challenges semiconductor companies and system houses face when creating today’s sophisticated electronics,” said K. Charles Janac, president and CEO of Arteris. “With 5 to 20 NoCs in an average SoC or chiplet, our customers need smart NoC IP that reduces design time while delivering superior quality of results, enabling faster innovation cycles for tomorrow’s products, which FlexGen delivers.”

With FlexGen, Arteris continues to revolutionize SoC and chiplet design automation based on Arm, RISC-V and x86 processors, enhancing productivity and positioning teams to address the complexities of next-generation electronic systems. Learn more at arteris.com/FlexGen.

About Arteris
Arteris is a leading provider of system IP for the acceleration of system-on-chip (SoC) development across today's electronic systems. Arteris network-on-chip (NoC) interconnect IP and SoC integration automation technology enable higher product performance with lower power consumption and faster time to market, delivering better SoC economics so its customers can focus on dreaming up what comes next. Learn more at arteris.com.

© 2004-2025 Arteris, Inc. All rights reserved worldwide. Arteris, Arteris IP, the Arteris IP logo, and the other Arteris marks found at arteris.com/trademarks are trademarks or registered trademarks of Arteris, Inc. or its subsidiaries. All other trademarks are the property of their respective owners.

Media Contact:
Gina Jacobs
Arteris
+1 408 560 3044
newsroom@arteris.com

A video accompanying this announcement is available at https://www.globenewswire.com/NewsRoom/AttachmentNg/d74cd54f-8012-4a90-9ad0-195c855ae234

FAQ

What are the key performance improvements of Arteris FlexGen for AIP shareholders?

FlexGen delivers up to 10x productivity boost in chip development, 30% reduction in wire length, 10% reduction in latency, and 90% reduction in manual adjustments through AI automation.

How has Dream Chip Technologies benefited from implementing Arteris FlexGen?

Dream Chip Technologies reduced design iterations from weeks to days in their Zukimo 1.1 automotive ADAS SoC, achieving superior power, performance, and area with shorter wire length and lower latencies.

What is the impact of FlexGen's AI automation on NoC design process?

FlexGen's AI-driven automation reduces manual adjustments by over 90%, enabling the generation of optimized NoC topologies in hours instead of days.

How does Arteris FlexGen address the challenges in automotive and AI chip design?

FlexGen streamlines chip design workflows and automates key processes, enabling companies to handle complex semiconductor designs with fewer resources for automotive, AI, 5G, and industrial IoT applications.