Credo Breaks the Memory Wall Using AMD Programmable Logic-Based AI Accelerators

Credo Technology Group Holding (CRDO) will demonstrate OmniConnect Weaver memory expansion on an AMD evaluation board at the 2026 OCP Global Summit.

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Credo Demonstrates OmniConnect Running on AMD Versal™ Adaptive SoC Architecture to Offer System Integrators Terabyte-Class Memory Capacity and Bandwidth Without Waiting on Custom Silicon

SAN JOSE, Calif.--(BUSINESS WIRE)-- Credo Technology Group Holding Ltd (Credo) (NASDAQ: CRDO), an innovator in providing connectivity at scale through fast, reliable, and energy-efficient system solutions, today announced that it is showcasing high-performance memory scaling for programmable logic-based AI accelerators this week at the 2026 OCP Global Summit in San Jose. Credo will demonstrate its OmniConnect Weaver memory fanout gearbox in a programmable logic-based environment, enabling high memory bandwidth and high memory capacity on an AMD Versal™ AI Edge Series Gen 2 adaptive SoC evaluation board. The system puts memory capacity and bandwidth previously only reserved for custom ASICs within the reach of programmable logic.

At the 2026 OCP Global Summit in San Jose, Credo will demonstrate its OmniConnect Weaver memory fanout gearbox in a programmable logic-based environment, enabling high memory bandwidth and high memory capacity on an AMD Versal™ AI Edge Series Gen 2 adaptive SoC evaluation board.

News Highlights:

• Credo and AMD have built a working emulation platform running OmniConnect Weaver memory disaggregation on AMD Versal AI Edge Series Gen 2 adaptive SoC architecture.
• The platform enables terabytes-class of LPDDR memory with very high capacity and bandwidth to a programmable-logic XPU over VSR links, on standard organic packaging with no silicon interposer.
• Application software runs unmodified as the expanded memory is transparent above the controller.

As AI inference workloads scale, memory bandwidth and capacity have become critical bottlenecks, often constraining performance more than compute throughput itself. Credo's OmniConnect Weaver memory gearbox is designed to address this directly. The AMD Versal adaptive SoC platform provides a highly programmable environment with high performance for faster time to market. By integrating Credo's OmniConnect technology, customers can break the memory ceiling with access to larger memory pools and increased memory throughput without fundamental changes to application software.

“Memory is what limits inference today, not compute, and the gap widens every generation,” said Vishal Shah, Vice President of Product, Credo. “By combining the versatile AMD Versal adaptive SoC platform with Credo's OmniConnect Weaver memory expansion technology, we are enabling customers to build scalable memory architectures that can unlock higher performance and greater efficiency for next-generation AI systems.”

“As AI inference workloads scale, customers need a practical path to higher memory performance without sacrificing the flexibility that drove the need for a programmable logic design in the first place,” said Manuel Uhm, Director of Silicon Marketing, Adaptive and Embedded Computing Group, AMD. “This collaboration with Credo demonstrates how customers can unlock significantly more memory bandwidth and capacity on the AMD Versal AI Edge Series Gen 2 device while preserving the efficiency, power and time-to-market advantages of programmable logic-based designs.”

Credo will demonstrate OmniConnect Weaver on the AMD Versal AI Edge Series Gen 2 adaptive SoC evaluation board at the 2026 OCP Global Summit, Booth B2. More information is available at https://credosemi.com/products/omniconnect/.

About Credo

Credo’s mission is to transform connectivity at scale through fast, reliable, and energy-efficient system solutions. Our high-speed copper and optical interconnect technologies deliver industry-leading power and performance from chip to cluster to meet the ever-expanding data infrastructure demands of AI.

Our vertically integrated connectivity portfolio is comprised of our flagship purple ZeroFlap (ZF) Active Electrical Cables (AECs) and ZF optical transceivers; optical components including silicon photonics-based photonic integrated circuits (SiPho PICs) and DSPs; OmniConnect AI memory and chip-to-chip interconnect; and retimers for Ethernet and PCIe—supported by our PILOT diagnostic and analytics software platform. Credo innovations enable our customers to connect the systems that connect the world.

For more information, please visit https://www.credosemi.com. Follow Credo on LinkedIn.

Credo, the Credo logo and the color purple when associated with AECs are registered trademarks of Credo Technology Group Limited in the United States and other jurisdictions. All other trademarks referenced herein are the property of their respective owners.

View source version on businesswire.com: https://www.businesswire.com/news/home/20261013236839/en/

Media Contact:
Kristin Hehir
kristin.hehir@credosemi.com

Investor Contact:
Dan O’Neil
dan.oneil@credosemi.com

Source: Credo

Key Terms

lpddr technical

LPDDR (Low-Power Double Data Rate) is a kind of computer memory built for phones, tablets and other battery-powered devices, offering fast data access while consuming less energy than standard memory. Investors monitor LPDDR because its efficiency and performance influence device battery life, manufacturing cost and component demand—traits that can affect product competitiveness, sales volume and supplier profit margins, much like a fuel-efficient engine improves a car’s appeal and running costs.

asic technical

ASIC is Australia’s corporate, markets and financial services regulator that enforces rules for companies, financial advisers and market operators; think of it as the referee and rulebook keeper for financial activity. It matters to investors because ASIC’s oversight, investigations and enforcement actions affect company credibility, legal risk and market fairness—actions that can change stock prices, investor confidence and the safety of financial products.

soc technical

Standard of care (often abbreviated SOC) is the treatment or management approach that is widely accepted and used by medical professionals for a particular disease or condition. For investors, SOC provides the benchmark against which new therapies, devices, or clinical results are judged—like comparing a new car to the current most popular model; a product that meaningfully outperforms the SOC can win market share and drive revenue, while failure to beat or match it limits commercial potential.

memory disaggregation technical

An architecture that separates a server's working memory from its local processors and places it in a shared pool that compute nodes access over a fast network, allowing machines to use more memory than they physically hold. Think of it like storing extra luggage in a nearby warehouse you can fetch quickly instead of stuffing it into your car. It matters to investors because it can change data center costs, hardware demand, scalability, and the competitive landscape for chips, networking gear, and cloud services.