Quicklogic Stock Price, News & Analysis

QuickLogic (NASDAQ: QUIK) has launched Aurora PRO, an enhanced version of its Aurora FPGA design tool featuring Synopsys Synplify® FPGA synthesis integration. The new tool delivers up to 50% improvement in resource utilization with customer designs achieving over 96% LUT utilization, and up to 10% increase in average frequency for eFPGA designs.

Aurora PRO is specifically optimized for QuickLogic's eFPGA architecture, featuring improvements in embedded carry chains, BRAM, and DSP blocks. The tool includes a redesigned user interface that integrates Synplify® synthesis within the Aurora GUI, enabling engineers to better manage area vs. timing trade-offs and accelerate design workflows.

QuickLogic (NASDAQ: QUIK) announced the unexpected passing of Board Director Christine Russell on July 11th, 2025. Ms. Russell served on the company's Board since June 2005, contributing nearly 20 years of service to the organization.

Board Chairman Michael J. Farese acknowledged Russell's significant contributions, highlighting her leadership, integrity, and guidance through various organizational phases. Her passing represents the loss of a long-standing board member who played a crucial role in the company's governance.

QuickLogic (NASDAQ: QUIK) announced its participation in the 2025 IEEE Nuclear and Space Radiation Effects Conference (NSREC) in Nashville, Tennessee from July 14-18. The company will showcase its radiation-tolerant, reprogrammable logic solutions at Booth #407.

The company will highlight its Australis™ eFPGA IP Generator, which creates custom eFPGA IP cores optimized for aerospace, satellite, and defense applications. With over 30 years of experience in the Aerospace and Defense sectors, QuickLogic specializes in solutions meeting strict Size, Weight, and Power (SWaP) requirements while addressing security and reliability challenges.

QuickLogic Corporation (NASDAQ: QUIK), a developer of embedded FPGA technology and AI solutions, has announced its participation in the 2025 Chips to Systems Conference (DAC) in San Francisco from June 23-25, 2025. The company will showcase its advanced eFPGA Hard IP and chiplet solutions at Booth #2222 in Moscone West. Visitors can explore QuickLogic's silicon-proven eFPGA Hard IP technology, which enables post-manufacturing flexibility and helps reduce time-to-market while optimizing performance, power, and area goals. The company will also present its chiplet solutions featuring Universal PHY™ technology and ecosystem support, designed to streamline heterogeneous integration in SoC and ASIC development.

QuickLogic (NASDAQ: QUIK) has joined the Intel Foundry Chiplet Alliance, strengthening its position in the eFPGA market. This strategic move gives QuickLogic early access to Intel Foundry's advanced process and packaging roadmaps, PDKs, and training. As a member, QuickLogic will participate in multi-project-wafer shuttles to reduce prototype cycles and costs. The company already offers eFPGA Hard IP on Intel's 18A process node through existing Intel Foundry IP and USMAG Alliance programs. This collaboration enables QuickLogic's reconfigurable logic blocks to work seamlessly with other Alliance members' die in multi-chip packages, supporting both U.S. Military, Aerospace & Government and commercial applications.

QuickLogic (NASDAQ: QUIK) reported its Q1 2025 financial results, showing a revenue decline to $4.3 million, down 23.7% year-over-year. The company posted a GAAP net loss of ($2.2 million), or ($0.14) per share, compared to net income of $0.1 million in Q1 2024. Notable achievements include delivering eFPGA Hard IP for Intel 18A customer Test Chip, securing a $1.4 million funding modification for radiation hardened program, and extending their $20 million credit facility to December 2026. New product revenue decreased to $3.7 million (-17.4% YoY), while mature product revenue fell to $0.6 million. GAAP gross margin declined to 43.4% from 67.1% in Q1 2024. The company attributes revenue decline primarily to timing of large eFPGA IP contract awards.

QuickLogic (NASDAQ: QUIK), a developer of embedded FPGA technology and AI solutions, has scheduled its Q1 fiscal 2025 financial results conference call for Tuesday, May 13, 2025, at 5:30 p.m. ET/2:30 p.m. PT.

The earnings call will be accessible via toll-free number 1-877-407-0792 (International: 1-201-689-8263) with no passcode required. A replay will be available through May 20, 2025, using passcode 13753277. Additionally, a webcast will be available on QuickLogic's IR Site Events Page for 12 months.

The company also announced its participation in the upcoming Ladenburg Thalmann Innovation EXPO25 in New York, NY on May 21. Interested investors can contact QuickLogic Investor Relations or their Ladenburg/B2i Digital representative to participate. Presentation materials will be available on the company's IR website.

QuickLogic (NASDAQ: QUIK) has achieved a significant milestone by delivering embedded FPGA (eFPGA) Hard IP optimized for Intel 18A technology for a customer's Test Chip. This marks the first-ever eFPGA Hard IP delivery for a sub-5nm process node, promising enhanced low power consumption, high performance, and optimal silicon area utilization.

Using their proprietary Australis™ IP Generator, QuickLogic completed the foundry-specific Hard IP in just six months. The technology is supported by two FPGA User Tools: Aurora, featuring 100% Open-Source components, and Aurora Pro, which includes Synopsys® Synplify® FPGA Logic Synthesis.

The eFPGA Hard IP for Intel 18A is immediately available and can be customized with varying resources of LUTs, Block RAM, and DSP Blocks to meet specific requirements for commercial and Defense Industrial Base designs.

QuickLogic (NASDAQ: QUIK) announced the integration of its embedded FPGA (eFPGA) IP into Faraday Technology 's FlashKit-22RRAM SoC Development Platform. The platform, implemented on UMC's 22ULP process technology, supports both Arm Cortex-M7 and VeeR EH1 RISC-V processors.

The FlashKit platform, designed for AIoT, consumer, and industrial applications, includes multiple systems, analog, and interface blocks, along with eNVM and QuickLogic's eFPGA IP for post-tape-out customization. This integration enables hardware functionality adaptation post-silicon, reducing time-to-market and extending product lifecycles through field upgradability.

The platform allows developers to make architectural tradeoffs between functions implemented on different subsystems, from software on processors to RTL on eFPGA to hard logic. QuickLogic's eFPGA IP, built on open-source toolchains, offers a scalable architecture that helps optimize power, performance, and area for unique workloads in edge AI and real-time sensor fusion applications.