Arteris Network-on-Chip Technology Achieves Deployment Milestone of 4 Billion Chips and Chiplets

Rhea-AI Summary

Arteris (Nasdaq: AIP) announced its network-on-chip interconnect technology has shipped in more than 4 billion chips and chiplets as of Feb. 12, 2026. Adoption is accelerating across AI-driven automotive, enterprise compute, consumer electronics, industrial and other segments.

Arteris said production volumes are rising, driving growth in its variable royalty revenue stream and extending beyond its historical average annual growth rate of approximately 20%.

Positive

• Deployment surpasses 4 billion chips and chiplets
• Revenue stream growth driven by rising variable royalties beyond ~20% historical rate
• Broad adoption across AI-driven automotive, enterprise compute, consumer and industrial segments

Negative

• None.

Key Figures

Deployed chips and chiplets: 4 billion+ devices Historical growth rate: 20%

2 metrics

Deployed chips and chiplets 4 billion+ devices Cumulative shipments of Arteris network-on-chip technology

Historical growth rate 20% Historical average annual growth rate referenced in article

Market Reality Check

Price: $14.92 Vol: Volume 408,664 is slightl...

normal vol

$14.92 Last Close

Volume Volume 408,664 is slightly below the 20-day average of 448,143 (relative volume 0.91). normal

Technical Price $15.10 is trading above the 200-day MA at $11.66, after a 0.07% gain over 24h.

Peers on Argus

AIP is up 0.07% while several peers like LAES (-3.03%), POET (-2.83%), and SKYT ...

AIP is up 0.07% while several peers like LAES (-3.03%), POET (-2.83%), and SKYT (-3.79%) are down, indicating a stock-specific reaction rather than a broad semiconductor move.

Common Catalyst Multiple peers (e.g., LAES, POET) also issued AI-focused headlines, suggesting wider AI-related news flow, but AIP’s price action remains idiosyncratic.

Historical Context

5 past events · Latest: Feb 11 (Positive)

Pattern 5 events

Date	Event	Sentiment	Move	Catalyst
Feb 11	AI deployment expansion	Positive	+0.1%	NXP expanded use of Arteris system IP across AI-enabled silicon.
Feb 02	Earnings date notice	Neutral	-4.3%	Announced Q4 and full-year 2025 results reporting date and call details.
Jan 16	Inducement RSU grants	Negative	-4.7%	Granted 477,208 RSUs to 25 new hires under inducement plan.
Jan 14	Acquisition close	Positive	-2.1%	Closed Cycuity acquisition to add semiconductor cybersecurity assurance.
Dec 11	Acquisition agreement	Positive	+0.3%	Entered definitive agreement to acquire Cycuity for hardware security IP.

Pattern Detected

Recent AIP news skew positive (AI deployments, acquisitions), but price reactions have often been muted or negative, indicating a tendency for limited upside follow-through even on favorable headlines.

Recent Company History

Over the last few months, Arteris has highlighted strategic expansion in AI and security. On Dec 11, 2025, it announced an agreement to acquire Cycuity, followed by deal closing on Jan 14, 2026 to add hardware cybersecurity assurance to its system IP portfolio. An inducement RSU grant on Jan 16, 2026 and an earnings date notice on Feb 2, 2026 saw negative price reactions. On Feb 11, 2026, broader NXP edge AI deployment news aligned with a small price gain, consistent with today’s AI deployment milestone.

Regulatory & Risk Context

Active S-3 Shelf · $200,000,000

Shelf Active

Active S-3 Shelf Registration 2025-12-11

$200,000,000 registered capacity

An effective S-3 shelf filed on Dec 11, 2025 allows Arteris to offer up to $200,000,000 in various securities over time, including up to $75,000,000 of common stock via an at-the-market program with Jefferies as sales agent at up to 3.0% of gross proceeds.

Market Pulse Summary

This announcement underscores Arteris’ scale, with its network-on-chip technology deployed in more t...

Analysis

This announcement underscores Arteris’ scale, with its network-on-chip technology deployed in more than 4 billion chips and chiplets and growth exceeding its historical 20% annual rate. Coupled with recent AI-focused design wins and the completed Cycuity acquisition, it highlights momentum in complex, AI-era SoC architectures. Investors may watch how this translates into royalty growth, how frequently the $200,000,000 shelf and $75,000,000 ATM capacity are used, and how upcoming results track against these deployment trends.

Key Terms

network-on-chip, interconnect ip, chiplets, soc, +1 more

5 terms

network-on-chip technical

"Arteris network-on-chip interconnect IP ships in production silicon"

A network-on-chip is the internal communication system that links many small processing and memory blocks inside a single computer chip, acting like a miniature road network that routes data between components. For investors, it matters because the design affects a chip’s speed, energy use, and ability to scale to more features—factors that influence product performance, manufacturing cost and the competitiveness of devices that use the chip.

interconnect ip technical

"Arteris network-on-chip interconnect IP ships in production silicon"

Interconnect IP is a reusable set of technical designs and software that lets different parts of a computer chip or electronic system talk to each other and to the outside world. Like the plumbing and road network inside a building, it determines how fast data flows, how much power is used, and how easily new components can be added — factors that affect performance, manufacturing cost and potential licensing revenue for investors.

chiplets technical

"chips and chiplets is not just a volume milestone"

Small, individual semiconductor components that are manufactured separately and then combined into a single package to perform the function of a larger chip. Like using Lego bricks instead of carving one big block, chiplets let designers mix and match proven parts to reduce cost, shorten development time, improve manufacturing yields and enable upgrades; investors watch them because they can lower production risk, boost product competitiveness and affect profit margins across the semiconductor supply chain.

soc technical

"overall SoC shipments are in the tens of billions annually"

Standard of care (often abbreviated SOC) is the treatment or management approach that is widely accepted and used by medical professionals for a particular disease or condition. For investors, SOC provides the benchmark against which new therapies, devices, or clinical results are judged—like comparing a new car to the current most popular model; a product that meaningfully outperforms the SOC can win market share and drive revenue, while failure to beat or match it limits commercial potential.

multi-die architectures technical

"accelerating the shift toward complex, multi-die architectures"

A multi-die architecture is a processor or electronic component built from several smaller semiconductor pieces assembled to act like a single chip, similar to connecting Lego bricks to make a larger structure instead of carving one big block. For investors, this matters because it can lower manufacturing cost, speed up design updates, improve yields and supply flexibility, and therefore affect product performance, time-to-market, margins and competitive position.

AI-generated analysis. Not financial advice.

Arteris network-on-chip interconnect IP ships in production silicon at accelerating scale across AI-driven automotive, enterprise computing, consumer electronics, industrial and other applications

CAMPBELL, Calif., Feb. 12, 2026 (GLOBE NEWSWIRE) -- Arteris, Inc. (Nasdaq: AIP), a leading provider of semiconductor technology for accelerating innovation in the AI era, today announced that its technology has shipped in more than 4 billion devices, signifying important growth in enabling the underlying data movement for AI-era chips and chiplets.

While Arteris system IP has long been deployed in high-volume devices, from automotive systems to consumer devices, recent growth has been driven by increased adoption in AI-enabled systems, where Arteris technology is particularly suited for rising compute density, energy efficiency requirements, chiplet integration, and ever-growing system complexity. Production deployment volumes continue to rise across all segments, driving corresponding growth in the Arteris variable royalty revenue stream and extending beyond the company’s historical average annual growth rate of approximately 20 percent.

“While overall SoC shipments are in the tens of billions annually, high-end, complex SoCs used in advanced compute, automotive, and AI data-intensive applications number in the low billions range today,” said Rich Wawrzyniak, principal analyst at the SHD Group. “Arteris pioneered network-on-chip IP, now a necessary system IP technology for today’s complex semiconductor designs. As the first company to commercialize NoC solutions, they built a strong early market lead and continue to expand their portfolio to address the industry’s escalating design challenges.”

The rapidly rising demand for high-performance compute, energy efficiency, and safety and security is accelerating the shift toward complex, multi-die architectures. Arteris network-on-chip technology is proven to address the associated interconnect needs, resulting in design wins that translate into volume deployments.

“Reaching more than 4 billion deployed chips and chiplets is not just a volume milestone, but a reflection of how essential data movement has become to modern system design,” said K. Charles Janac, president and CEO of Arteris. “As AI systems grow larger, more distributed, and more heterogeneous, the data movement enabled by the interconnect architecture is now as foundational as compute and memory. We’re proud to see Arteris technology at the heart of so many advanced systems today from data centers to edge devices and physical AI systems, and we look forward to a rapid increase in Arteris connected SoCs coming to market, based on our customers’ innovation.”

About Arteris
Arteris is a leading provider of semiconductor technology that accelerates the creation of high-performance, power-efficient silicon with built-in safety, reliability, and security. Innovative Arteris products are designed to optimize data movement and help ease complexity in the modern AI era with network-on-chip (NoC) interconnect intellectual property (IP), system-on-chip (SoC) software for integration automation and hardware security assurance. All are used by the world's top technology companies to improve overall performance and engineering productivity, reduce risk, lower costs, and bring cutting-edge designs to market faster. Learn more at arteris.com.

© 2004-2026 Arteris, Inc. All rights reserved worldwide. Arteris, Arteris IP, the Arteris IP logo, and the other Arteris marks found at https://www.arteris.com/trademarks are trademarks or registered trademarks of Arteris, Inc. or its subsidiaries. All other trademarks are the property of their respective owners.

Media Contact:
Arteris Inc.
Gina Jacobs
+1 408 560 3044
newsroom@arteris.com

This press release was published by a CLEAR® Verified individual.

FAQ

How many chips and chiplets has Arteris (AIP) deployed as of February 12, 2026?

Arteris has shipped in more than 4 billion chips and chiplets as of Feb. 12, 2026. According to Arteris, this milestone reflects accelerating production deployment across AI, automotive, enterprise, consumer and industrial applications.

What does the 4 billion deployment milestone mean for Arteris (AIP) revenue?

The milestone supports rising variable royalty revenue tied to production volumes. According to Arteris, increasing deployment is driving royalty growth beyond its historical average annual growth rate of about 20%.

Which markets are driving Arteris (AIP) adoption and volume growth?

Adoption is accelerating in AI-enabled systems, automotive, enterprise compute, consumer electronics, and industrial segments. According to Arteris, those markets demand higher compute density, energy efficiency, and chiplet integration driving deployment.

Why is network-on-chip technology important for AI-era chips according to Arteris (AIP)?

Network-on-chip is described as foundational for managing data movement in complex SoCs and chiplets. According to Arteris, interconnect architecture is now as essential as compute and memory for distributed, heterogeneous AI systems.

How might Arteris (AIP) benefit from the shift to multi-die, chiplet-based architectures?

Arteris expects increased demand as multi-die architectures need scalable interconnect solutions for data movement. According to Arteris, its NoC IP addresses interconnect needs, translating design wins into higher volume deployments and royalties.