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Cadence Design Systems Inc (CDNS) provides critical electronic design automation (EDA) software and semiconductor intellectual property solutions powering modern chip development. This news hub offers investors and industry professionals centralized access to official announcements and market-relevant updates.
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Cadence (Nasdaq: CDNS) has achieved a significant technological breakthrough with the tapeout of the industry's first LPDDR6/5X memory IP system solution operating at 14.4Gbps - up to 50% faster than previous LPDDR DRAM generations.
The new solution includes an advanced PHY architecture and high-performance controller, supporting both LPDDR6 and LPDDR5X DRAM protocols. It's designed to meet increasing memory bandwidth demands for AI infrastructure, including LLMs and compute-heavy workloads. The system is already engaging with leading AI, HPC, and data center customers.
The solution supports traditional SoCs and multi-die architectures through Cadence's chiplet framework, offering flexibility for various markets including AI, mobile, consumer, enterprise HPC, and cloud data centers.
Cadence (Nasdaq: CDNS) has scheduled its second quarter 2025 financial results webcast for Monday, July 28, 2025, at 2:00 PM Pacific Time. The presentation will feature Dr. Anirudh Devgan, president and CEO, along with John Wall, senior vice president and CFO.
The webcast recording will be accessible on the company's investor relations website from 5:00 PM PT on July 28 until 5:00 PM PT on September 16, 2025.
Cadence Design Systems (NASDAQ: CDNS) has announced that Senior Vice President and CFO John Wall will participate in a fireside chat at the BofA Securities 2025 Global Technology Conference. The presentation is scheduled for Tuesday, June 3, 2025, at 10:00 a.m. PDT.
The event will be accessible via live webcast on the company's website, and the recording will remain available for replay for 180 days through Cadence's investor relations page at cadence.com/cadence/investor_relations.
Cadence (CDNS) has unveiled the Tensilica NeuroEdge 130 AI Co-Processor (AICP), a new processor designed to complement neural processing units (NPUs) for AI applications. The processor delivers 30% area savings and over 20% reduction in dynamic power and energy while maintaining performance levels. The NeuroEdge 130 AICP features an extensible design compatible with various NPUs and is supported by the NeuroWeave Software Development Kit.
The processor is specifically designed for end-to-end execution of agentic and physical AI networks in automotive, consumer, industrial, and mobile SoCs. It includes VLIW-based SIMD architecture with configurable options and optimized ISA for non-NPU tasks. The product is currently available and is ISO 26262-ready for automotive applications.
Cadence Design Systems (NASDAQ: CDNS) has announced that Nimish Modi, Senior Vice President and General Manager of Strategy & New Ventures, will participate in a virtual fireside chat at the 20th Annual Needham Technology, Media, & Consumer Conference. The presentation is scheduled for Monday, May 12, 2025, at 10:30 a.m. PDT. Investors and interested parties can access the live webcast through Cadence's website, and the presentation will remain available for replay for 90 days following the event.
Cadence has significantly expanded its design IP portfolio optimized for Intel 18A and Intel 18A-P technologies, focusing on advancing AI, HPC, and mobility applications. The collaboration includes:
- New IP additions including 224G SerDes, DDR5-12.8G, and UCIe 1.1 48G for chiplet architectures
- AI-driven digital and analog/custom design solutions certified for Intel 18A PDK
- Advanced packaging workflow development using Intel's EMIB-T technology
As a founding member of the Intel Foundry Chiplet Alliance, Cadence is strengthening its partnership with Intel Foundry to deliver optimized power, performance, and area efficiencies. The expanded portfolio leverages RibbonFET Gate-all-around transistors and PowerVia backside power delivery network, enabling customers to accelerate time-to-market for cutting-edge system-on-chip designs.
Cadence reported strong Q1 2025 financial results, with revenue reaching $1.242 billion, up 23% year-over-year. The company's non-GAAP earnings per share increased 34% to $1.57.
Key financial highlights:
- GAAP operating margin improved to 29.1% from 24.8% in Q1 2024
- Quarter-end backlog reached $6.4 billion
- Current remaining performance obligations stood at $3.2 billion
The company raised its 2025 outlook, now expecting:
- Revenue between $5.15-5.23 billion
- Non-GAAP EPS of $6.73-6.83
Business performance was strong across segments, with Semiconductor IP revenue growing 40% and Core EDA revenue up 16%. The AI-driven Cadence Cerebrus platform gained nearly 50 new customers in Q1. The company expanded its partnership with NVIDIA and saw over 50% growth in System Design and Analysis revenue.