Cadence Expands Collaboration with TSMC and Microsoft to Accelerate Timing Signoff for Giga-Scale Designs on the Cloud
Highlights:
- Customers benefit from improved productivity and scalability with Cadence signoff solutions and TSMC technology on the Microsoft Azure cloud with the Cadence CloudBurst Platform
- Cadence Tempus Timing Signoff Solution demonstrated distributed scalability on a 10+ billion transistor design while reducing compute costs for maximum efficiency
For details on the collaboration, a new white paper is available immediately for customer download at TSMC-Online at https://online.tsmc.com/online/. This white paper contains cloud scaling strategies focused on distributed execution, detailed illustrations of the Cadence Tempus Timing Signoff Solution cloud execution, sample scripts, Cadence CloudBurst reference architecture and Microsoft’s Azure Cloud IT best practices.
“Semiconductor designers are consistently pushing the boundaries to create increasingly large designs, and it’s critical for design teams to meet their tight product schedules,” said
Timing Signoff in the Cloud of Giga-scale Designs
To address signoff of giga-scale designs, the Cadence Tempus Timing Signoff Solution features a massively parallel architecture, known as distributed static timing analysis (DSTA). DSTA is production-proven in the cloud on large-scale TSMC advanced-node tapeouts and provides the scalability necessary to signoff the world’s largest designs. Using DSTA, Cadence demonstrated a methodology that minimized compute cost and completed timing signoff for a 10+ billion transistor design in hours versus days when compared with a traditional non-distributed STA approach. For customers who want to focus on design excellence and PPA gains rather than expending effort on IT setup and securing a cloud environment, the Cadence CloudBurst platform provides a ready-to-use, EDA-optimized and secure cloud environment for a full design flow or peak demand requirements for specific functions such as timing signoff.
“Through our continued collaboration with TSMC and Microsoft, we’re setting new industry benchmarks and improving customers’ ability to meet their schedules by adopting the Tempus Timing Signoff Solution in the cloud,” said Dr.
The Cadence Tempus Timing Signoff Solution is part of the broader full flow digital suite, which provides customers with a predictable and accelerated path to design closure. The CloudBurst Platform provides fast and easy access to Cadence tools and is part of the broader Cadence Cloud Portfolio. The digital and cloud portfolios support the Cadence Intelligent System Design™ strategy, which enables customers to achieve system-on-chip (SoC) design excellence.
About Cadence
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications, including consumer, hyperscale computing, 5G communications, automotive, mobile, aerospace, industrial and healthcare. For seven years in a row,
© 2021
Category: Featured
View source version on businesswire.com: https://www.businesswire.com/news/home/20211201005400/en/
Cadence Newsroom
408-944-7039
newsroom@cadence.com
Source: