Welcome to our dedicated page for Cadence Design System news (Ticker: CDNS), a resource for investors and traders seeking the latest updates and insights on Cadence Design System stock.
Cadence Design Systems, Inc. (Nasdaq: CDNS) is a software publisher focused on electronic design automation (EDA), design IP and system design and analysis, with a strong emphasis on AI and digital twins. The CDNS news feed highlights how the company’s computational software and Intelligent System Design™ strategy support semiconductor and systems companies across hyperscale computing, mobile communications, automotive, aerospace, industrial, life sciences and robotics.
Investors and industry followers can use this page to review company announcements on financial results, including quarterly earnings releases, backlog updates, margin disclosures and business outlooks, which Cadence distributes via press releases and related 8-K filings. These updates often include commentary from senior management and details on product and maintenance revenue, services revenue and non-GAAP metrics.
Cadence news also covers technology milestones and product introductions. Examples include LPDDR5X and LPDDR6 memory IP system solutions for AI training, inference and data center workloads, as well as announcements related to memory and interface IP for standards such as HBM, DDR5, PCIe, UCIe, UALink and high-speed Ethernet. Other releases describe the company’s Chiplet Spec-to-Packaged Parts ecosystem and Physical AI chiplet platform, developed in collaboration with partners like Arm and Samsung Foundry to support chiplet-based architectures for physical AI, data center and HPC applications.
Additional news items address strategic transactions and governance, such as the acquisition of Secure-IC, the planned acquisition of Hexagon’s design and engineering business, and board appointments including Dr. Luc Van den hove. Community-focused announcements, like the Cadence Giving Foundation’s multi-year commitment to expand the AI Hub at San José State University, provide insight into the company’s engagement with education and the broader AI ecosystem.
By following CDNS news, readers can track how Cadence’s EDA tools, design IP, AI and digital twin technologies evolve, how the company communicates its financial performance, and how strategic partnerships and acquisitions shape its role in semiconductor and system design. Bookmark this page to access an organized stream of Cadence press releases and related updates.
Cadence Design Systems (Nasdaq: CDNS) announces participation in the virtual Cowen 49th Annual Technology, Media and Telecom Conference. John Wall, CFO, will engage in a fireside chat on June 1, 2021, starting at 11:50 a.m. EDT. The event will be available for live streaming and also archived for replay until July 2, 2021. Cadence, a leader in electronic design, leverages over 30 years of expertise to support innovative companies across various sectors, including automotive and 5G communications.
Cadence Design Systems (Nasdaq: CDNS) has launched its Cadence® IP for PCI Express® (PCIe®) 5.0 specification on TSMC's N5 process technology. This new offering enhances high-bandwidth applications in hyperscale computing and networking. The architecture promises best-in-class power efficiency with a maximum data transfer rate of 32GT/s. The PCIe 5.0 architecture supports Cadence’s Intelligent System Design strategy. Collaboration with TSMC is set to accelerate silicon innovation, meeting customer demands for total solutions that shorten development timelines.
Cadence Design Systems (Nasdaq: CDNS) launched its third-generation 112G long-reach SerDes IP on TSMC’s N5 process, targeting hyperscale ASICs and AI/ML accelerators. The new architecture achieves 25% power savings and a 40% area reduction compared to the previous generation. It supports high-bandwidth, reliable products for cloud data centers. With improvements in DSP and supply noise immunity, Cadence enhances performance for chip connectivity. The company leverages collaborations with major customers to drive innovation, reinforcing its leadership in high-performance connectivity solutions.
Cadence Design Systems (Nasdaq: CDNS) announced that JVCKENWOOD has adopted its Spectre FX Simulator and various design solutions to enhance IC development for consumer electronics. JVCKENWOOD switched from its previous EDA vendor to leverage Cadence's advanced tools, including the Virtuoso platform and Xcelium Logic Simulation. The collaboration aims to reduce time-to-market by 40% in certain product categories, improve simulation accuracy, and facilitate seamless integration across design processes. This strategic partnership reflects Cadence’s commitment to delivering innovative solutions for evolving market demands.
Cadence Design Systems, Inc. (Nasdaq: CDNS) has launched the Cadence® Spectre® FX Simulator, a cutting-edge FastSPICE circuit simulator designed for efficient verification of memory and large-scale system-on-chip (SoC) designs. This simulator boasts up to 3X performance improvement over competitors while maintaining or exceeding accuracy. Key features include scalability up to 32 cores, a user-friendly model, seamless integration with existing tools, and extensive verification capabilities. The simulator is expected to streamline SoC design verification, addressing the industry's increasing demand for speed and precision.
Cadence Design Systems (Nasdaq: CDNS) will have CEO Lip-Bu Tan participate in a virtual fireside chat at the J.P. Morgan Global Technology, Media, and Communications Conference on May 25, 2021. The event is scheduled for 2:55 p.m. EDT and will be available for live streaming. After the event, the presentation will be archived on the Cadence website and accessible for replay until July 2, 2021, at 5:00 p.m. PDT. Cadence is recognized for its innovation in electronic design and has been named one of Fortune's 100 Best Companies to Work For for seven consecutive years.
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Cadence Design Systems (Nasdaq: CDNS) announced that Global Unichip Corporation (GUC) has deployed the Cadence Clarity 3D Solver, achieving a 5X boost in simulation performance for a complex network switch with numerous 112G PAM4 long-reach lanes. The solver's efficiency eliminates the need for design partitioning, enhancing result accuracy. GUC utilized a complete Cadence solution, including the Allegro Package Designer Plus, accelerating design turnaround and optimizing performance while minimizing costs. The collaboration highlights Cadence's role in hyperscale computing applications.
Cadence Design Systems (Nasdaq: CDNS) is expanding its collaboration with Arm to enhance hyperscale computing and 5G SoC development using Cadence tools alongside Arm's Neoverse V1 and N2 platforms. This initiative follows successful implementations with the Neoverse N1 platform, utilizing Cadence's digital and verification flows optimized for advanced 5nm and 7nm technologies. Customers will benefit from Rapid Adoption Kits (RAKs) aimed at improving power, performance, and area (PPA) efficiency, as well as a comprehensive verification flow that ensures high throughput for Arm Neoverse-based SoCs.
Cadence Design Systems (Nasdaq: CDNS) reported first quarter 2021 revenue of $736 million, up from $618 million a year ago. The company achieved a GAAP operating margin of 28% and net income of $187 million, or $0.67 per share, compared to $124 million and $0.44 per share in Q1 2020. Non-GAAP metrics show an operating margin of 38% and net income of $231 million, or $0.83 per share. Cadence raised its 2021 revenue outlook to between $2.88 billion and $2.93 billion, with guided net income per share projected at $2.99 to $3.07.