Welcome to our dedicated page for Cadence Design System news (Ticker: CDNS), a resource for investors and traders seeking the latest updates and insights on Cadence Design System stock.
Cadence Design Systems, Inc. (Nasdaq: CDNS) is a software publisher focused on electronic design automation (EDA), design IP and system design and analysis, with a strong emphasis on AI and digital twins. The CDNS news feed highlights how the company’s computational software and Intelligent System Design™ strategy support semiconductor and systems companies across hyperscale computing, mobile communications, automotive, aerospace, industrial, life sciences and robotics.
Investors and industry followers can use this page to review company announcements on financial results, including quarterly earnings releases, backlog updates, margin disclosures and business outlooks, which Cadence distributes via press releases and related 8-K filings. These updates often include commentary from senior management and details on product and maintenance revenue, services revenue and non-GAAP metrics.
Cadence news also covers technology milestones and product introductions. Examples include LPDDR5X and LPDDR6 memory IP system solutions for AI training, inference and data center workloads, as well as announcements related to memory and interface IP for standards such as HBM, DDR5, PCIe, UCIe, UALink and high-speed Ethernet. Other releases describe the company’s Chiplet Spec-to-Packaged Parts ecosystem and Physical AI chiplet platform, developed in collaboration with partners like Arm and Samsung Foundry to support chiplet-based architectures for physical AI, data center and HPC applications.
Additional news items address strategic transactions and governance, such as the acquisition of Secure-IC, the planned acquisition of Hexagon’s design and engineering business, and board appointments including Dr. Luc Van den hove. Community-focused announcements, like the Cadence Giving Foundation’s multi-year commitment to expand the AI Hub at San José State University, provide insight into the company’s engagement with education and the broader AI ecosystem.
By following CDNS news, readers can track how Cadence’s EDA tools, design IP, AI and digital twin technologies evolve, how the company communicates its financial performance, and how strategic partnerships and acquisitions shape its role in semiconductor and system design. Bookmark this page to access an organized stream of Cadence press releases and related updates.
Cadence Design Systems (Nasdaq: CDNS) announced that Vidatronic has successfully utilized the Cadence Spectre X Simulator to enhance electromigration and IR drop reliability analysis on advanced 7nm and 5nm analog IP designs. This resulted in a speed increase of up to 10X and a 3X reduction in memory usage compared to prior versions. The simulator enabled complex simulations, significantly reducing verification time from days to hours, allowing Vidatronic to accelerate its market readiness. This achievement underscores Cadence's commitment to software excellence in electronic design.
Cadence Design Systems (Nasdaq: CDNS) announced a significant achievement with L&T Technology Services (LTTS), which reduced its design cycle time for mobile camera and memory devices by nearly 40 percent, from eight weeks to five. This improvement was made possible by implementing the Cadence Clarity 3D Solver, which provided enhanced accuracy and speed in analyzing complex signals. The Clarity 3D Solver's integration with Cadence Allegro and Sigrity systems allowed LTTS to perform multiple design iterations quickly, eliminating delays and improving design confidence.
Cadence Design Systems (Nasdaq: CDNS) announced that its Tensilica ConnX B10 and B20 DSPs are the first in the industry to achieve ASIL B(D) certification for automotive radar, lidar, and V2X applications, complying with ISO 26262:2018 standards. This certification supports the development of automotive systems-on-chip (SoCs) for autonomous and advanced driver assistance systems. With capabilities for various data types and specific accelerations, these DSPs enhance processing performance for complex automotive functions, ensuring compliance and safety.
Cadence Design Systems (Nasdaq: CDNS) has launched a new R&D Centre of Excellence in Cork, Ireland, aiming to create around 150 engineering jobs over the next three years. This center will focus on advancing customer design in various sectors, including consumer electronics and 5G communications. The move strengthens Cadence's commitment to its Irish operations, complementing its existing Shared Services Centre in Dublin. The initiative is expected to enhance the local tech ecosystem, providing significant employment opportunities and fostering innovation in the region.
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Cadence Design Systems (Nasdaq: CDNS) announced its custom and analog/mixed-signal IC design flow has been certified for Samsung Foundry's 3nm GAA process technology. This certification allows Cadence and Samsung's customers to leverage an automated design, layout, signoff, and verification flow for applications in automotive, mobile, data center, and AI sectors. Key features of the flow include improved productivity through automated constraint-driven layout, advanced circuit verification, and seamless interoperability with digital block implementation. This milestone enhances design capabilities for next-generation products.
Cadence Design Systems reported third quarter 2020 revenue of $667 million, up from $580 million in the same quarter of 2019. The company achieved a GAAP operating margin of 25% and net income of $162 million ($0.58 per share), compared to $102 million ($0.36 per share) a year earlier. Non-GAAP results showed an operating margin of 36% and net income of $197 million ($0.70 per share). Cadence raised its 2020 revenue guidance to $2.643 billion to $2.663 billion and announced stock repurchases of $75 million.
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Cadence Design Systems (Nasdaq: CDNS) has launched the Clarity 3D Transient Solver, a powerful system-level simulation tool designed to accelerate electromagnetic interference (EMI) solutions. This product offers up to 10X faster performance compared to traditional 3D field solvers and eliminates the need for costly anechoic test chambers. The technology allows for rapid, large-scale simulations, reducing design cycle times by up to 30% for various markets, including automotive and aerospace. The Clarity 3D Transient Solver supports Cadence's Intelligent System Design strategy and is expected to be available in early 2021.
Cadence Design Systems (Nasdaq: CDNS) launched its new Cadence System-Level Verification IP (System VIP) to enhance system-on-chip (SoC) verification. The suite automates testbench assembly, traffic generation, and performance analysis, achieving up to 10X efficiency in chip-level verification. Key components include the System Testbench Generator, System Traffic Libraries, System Performance Analyzer, and System Verification Scoreboard. The solution extends Cadence’s leadership in IP-level verification to chip-level challenges, ensuring better throughput and quality in complex SoC designs.