Marvell Launches Next-generation CXL Switch, Enabling Memory Pooling to Break Through the AI “Memory Wall”

Key Terms

cxl technical

An abbreviation for “cancel” or “canceled,” used in brief notices to indicate that an event, order, meeting, dividend, or other planned action will no longer take place. Investors care because cancellations can change expected cash flows, timing of corporate actions, trading volume or regulatory filings—similar to someone calling off a planned event, which can alter plans and prompt reassessment of value or risk.

llm technical

A large language model (LLM) is an advanced computer system trained on vast amounts of written text to understand and generate human-like language, similar to a very fast, well-read assistant that can summarize documents, draft messages, or answer questions. Investors care because LLMs can speed up research, automate customer support, and reduce costs, while also creating new product opportunities and risks around accuracy, bias, and regulatory oversight that can affect a company’s performance.

dram technical

A dram is a small, traditional unit used to measure either mass or liquid volume in manufacturing and pharmaceuticals — roughly 1.77 grams for a weight dram or about 3.7 milliliters for a fluid dram, similar to a small teaspoon or a couple of drops. Investors care because dram-based measurements affect drug dosing, packaging sizes, labeling compliance and raw-material usage, which in turn influence production costs, inventory counts and regulatory risk.

cxl 3.0 technical

CXL 3.0 is the latest version of a technical standard that lets processors, memory, and specialized chips share data and memory much more quickly and flexibly, like giving multiple workers access to a common, fast filing cabinet instead of each keeping separate copies. For investors, widespread adoption can lower costs, increase performance for data‑center and AI workloads, and benefit companies that make compatible chips, servers, or networking gear by expanding addressable markets and accelerating product upgrades.

pcie technical

PCIe (PCI Express) is a high-speed connection standard used inside computers and servers to link components like graphics cards, storage drives, and network adapters so they can send data quickly to each other. Investors care because faster, more efficient PCIe support can make a product more competitive—think of it as wider, faster highway lanes for data—which affects device performance, upgrade flexibility, manufacturing cost and customer demand.

Marvell Structera S Pooling Capability Offers Higher Memory Utilization, Improved Data Flow Efficiency and AI Application Performance, and Greater Infrastructure Flexibility

LOS ANGELES--(BUSINESS WIRE)-- OFC 2026 – Marvell Technology, Inc. (NASDAQ: MRVL), a leader in data infrastructure semiconductor solutions, today announced Marvell® Structera™ S 30260―a new 260-lane CXL switch device that enables rack-level memory pooling. Working in concert with Marvell Structera A near-memory accelerators, Structera X memory-expansion controllers and Alaska® P PCIe/CXL retimers, the new switch allows data center operators to further increase memory bandwidth and capacity by providing access to disaggregated memory resources outside the server.

CXL switching has long supported traditional CPU computing architectures and has also now become essential for accelerated AI data center infrastructure. As AI clusters expand dramatically in scale and complexity, memory capacity has hit a wall, becoming a primary constraint on the performance and efficiency of these systems. Exploding large language model (LLM) sizes, expanding context windows and growing key-value cache requirements are driving unprecedented memory demands. Traditional approaches are becoming increasingly inefficient and costly, and they cannot support the massive capacity required by these larger and more complex AI workloads.

Leveraging industry-leading switch solutions through the recent acquisition of XConn Technologies, the Structera S CXL switch device enables true memory pooling across the rack, allowing hyperscalers and data center operators to dynamically expand and allocate memory resources across CPUs, GPUs, XPUs and other accelerators without replacing existing platforms or relying solely on HBM stacking. It enables a large scalable, composable resource that can deliver higher memory utilization, improved data flow efficiency and AI application performance, greater infrastructure design flexibility and scalability, and reduced overall total cost of ownership.

“Breaking through the AI memory wall requires a fundamental architectural change,” said Rishi Chugh, vice president and general manager, Data Center Switch Business Unit at Marvell. “The Structera S CXL switch is the first true CXL switching solution purpose-built for AI. By enabling composable memory across the fabric, we are fundamentally reshaping and improving memory pooling efficiency as AI infrastructure scales.”

“KV‑cache is driving an exploding demand for memory capacity to support LLM inference,” said Gerry Fan, senior vice president, engineering, Scale-up Switching at Marvell. “The CXL switch offers an ideal solution by providing a near‑local, shared memory pool with sub‑microsecond access, which eliminates multi-hop data movement and unlocks higher throughput, longer context and improved GPU utilization.”

“Limited availability of DRAM in the market and runaway pricing, compounded with broader macroeconomic and supply chain issues, are upending the plans of data center operators as they rush to scale infrastructure to support rapidly expanding AI workflows,” said James Sanders, senior analyst at TechInsights. “Industry adoption of CXL 3.0-compliant technologies, including the Structera S CXL switch, can help alleviate these issues, giving operators the flexibility to scale infrastructure as needed to meet future AI infrastructure demand.”

Industry’s First Comprehensive CXL Portfolio

With CXL 3.0 support and aggregate bandwidth up to 4TB/s, the Structera S CXL switch bolsters the existing Marvell CXL product family, which includes Marvell Structera A CXL near-memory accelerators and Structera X CXL memory-expansion controllers. It also includes Marvell Alaska P PCIe/CXL retimers and copper and optical cable solutions from Marvell ecosystem partners. The PCIe/CXL cable solutions scale connections between GPUs, CPUs, XPUs, CXL memory, SSDs, and other PCIe components, enabling low-power, high-speed and low-latency connectivity that scales within servers and clusters to power accelerated AI data center infrastructure.

The addition of XConn Technologies CXL switches to the existing Marvell CXL portfolio creates a complete end-to-end CXL fabric architecture spanning expansion, acceleration and pooling, supporting both traditional compute and next-generation scale-up AI environments.

Availability

The Marvell Structera S 30260 CXL switch is expected to begin sampling to customers in calendar Q3 2026. The Structera S 20256 CXL 2.0 switch is currently in production.

Marvell will showcase its end-to-end connectivity portfolio at OFC 2026, March 17–19, at the Los Angeles Convention Center in Los Angeles, California. Visit the Marvell booth #1600 to learn how the company is enabling the next generation of data center and AI infrastructure.

About Marvell

To deliver the data infrastructure technology that connects the world, we’re building solutions on the most powerful foundation: our partnerships with our customers. Trusted by the world’s leading technology companies for over 30 years, we move, store, process and secure the world’s data with semiconductor solutions designed for our customers’ current needs and future ambitions. Through a process of deep collaboration and transparency, we’re ultimately changing the way tomorrow’s enterprise, cloud and carrier architectures transform—for the better.

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Media Contact:

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Source: Marvell Technology, Inc.