Marvell to Showcase Latest AI Data Center Connectivity Solutions at DesignCon 2026

Key Terms

die-to-die (d2d) technical

Die-to-die (d2d) describes a physical electrical connection or data pathway between two separate silicon chips (dies) inside the same package, allowing them to exchange signals directly rather than through longer board-level traces. For investors, d2d links matter because they enable higher performance, lower power use and more compact designs—think of adding a private hallway between two rooms instead of sending messages through the building corridor—affecting product competitiveness, manufacturing complexity and costs.

serdes technical

SerDes (short for serializer/deserializer) is an electronic function that converts parallel streams of data into a single fast serial stream and then converts it back, like packing many lanes of traffic into one high-speed highway and unpacking them at the other end. Investors care because SerDes chips and blocks determine how quickly and efficiently devices, data centers and networks can move information; improvements or bottlenecks affect product performance, production costs, and demand across the semiconductor and communications supply chain.

pcie 7.0 technical

PCIe 7.0 is the latest generation of the PCI Express standard, the high-speed electrical interface that lets core computer parts—processors, graphics cards, storage drives and network cards—move large amounts of data between each other. It matters to investors because each new PCIe version enables faster, more efficient servers and devices, spurs demand for upgraded chips and hardware, and can influence sales cycles, margins and competitive positions in semiconductors and data-center equipment; think of it as widening a digital highway to allow much higher traffic flow.

Extensive Technology Ecosystem Partners to Demonstrate Marvell-powered Offerings

SANTA CLARA, Calif.--(BUSINESS WIRE)-- Marvell Technology, Inc. (NASDAQ: MRVL), a leader in data infrastructure semiconductor solutions, today announced it will showcase its latest data center connectivity products and technologies driving the next wave of AI innovation at DesignCon 2026—February 24 to 26 at the Santa Clara Convention Center in Santa Clara, California.

The primary bottleneck in AI data center infrastructure has shifted from compute to connectivity. Data center operators require scalable, ultra-high performance connectivity solutions to address the massive growth of new, more demanding AI workloads. To meet this challenge, Marvell is driving advancements in interconnect technology at the package-, server- and rack-level, working closely with an extensive partner ecosystem to deliver solutions that provide exceptional bandwidth, power savings and performance at scale.

At DesignCon 2026, Marvell will showcase the latest advances in its end-to-end data center connectivity portfolio. In a diverse lineup of panels and presentations, Marvell experts will review the latest in silicon, cabling, memory and other technologies for advanced data center infrastructure.

Additionally, Marvell plans to showcase the following demonstrations in it its DesignCon booth (#904):

• 40G die-to-die (D2D) interfaces for high-bandwidth memory (HBM)
• 224G LR SerDes over co-packaged copper (CPC)
• 200G/lane active copper cable (ACC)
• PCIe 7.0 and PCIe 8.0 SerDes
• PCIe 6.0 active electrical cable (AEC)
• 1.6T active electrical cable (AEC)

Partner Booth Innovations

Ecosystem partners demonstrating Marvell-powered interconnect solutions include:

• Amphenol (Booth 833 and 1237)
• Foxconn Interconnect Technology (FIT) (Booth 719)
• Infraeo (Booth 760)
• Luxshare-Tech (Booth 839)
• Molex (Booth 739)
• Samtec (Booth 939)
• SENKO (Booth 958)
• TE Connectivity (Booth 639)
• Tektronix (Booth 819)
• 3M (Booth 420)

About Marvell

To deliver the data infrastructure technology that connects the world, we’re building solutions on the most powerful foundation: our partnerships with our customers. Trusted by the world’s leading technology companies for over 30 years, we move, store, process and secure the world’s data with semiconductor solutions designed for our customers’ current needs and future ambitions. Through a process of deep collaboration and transparency, we’re ultimately changing the way tomorrow’s enterprise, cloud and carrier architectures transform—for the better.

Marvell and the M logo are trademarks of Marvell or its affiliates. Please visit www.marvell.com for a complete list of Marvell trademarks. Other names and brands may be claimed as the property of others.

This press release contains forward-looking statements within the meaning of the federal securities laws that involve risks and uncertainties. Forward-looking statements include, without limitation, any statement that may predict, forecast, indicate or imply future events, results or achievements. Actual events, results or achievements may differ materially from those contemplated in this press release. Forward-looking statements are only predictions and are subject to risks, uncertainties and assumptions that are difficult to predict, including those described in the “Risk Factors” section of our Annual Reports on Form 10-K, Quarterly Reports on Form 10-Q and other documents filed by us from time to time with the SEC. Forward-looking statements speak only as of the date they are made. Readers are cautioned not to put undue reliance on forward-looking statements, and no person assumes any obligation to update or revise any such forward-looking statements, whether as a result of new information, future events or otherwise.

View source version on businesswire.com: https://www.businesswire.com/news/home/20260224533848/en/

Media Contact:

George Millington

pr@marvell.com

Source: Marvell Technology, Inc.