Synopsys Inc Stock Price, News & Analysis

Synopsys (NASDAQ: SNPS) has suspended its financial guidance for Q3 FY2025 and full FY2025 following a letter from the Bureau of Industry and Security (BIS) of the U.S. Department of Commerce. The letter, received on May 29, 2025, after the company's Q2 FY2025 earnings announcement, outlines new export restrictions related to China. The company is currently evaluating how these restrictions might affect its business operations, financial results, and overall financial condition.

Synopsys (NASDAQ: SNPS) has scheduled its second quarter fiscal year 2025 earnings release for Wednesday, May 28, 2025, after market close. The company will host a conference call at 2:00 p.m. Pacific Time / 5:00 p.m. Eastern Time to discuss financial results and business outlook.

Financial information will be available on the investor website before the call. A live webcast will be accessible to participants, who should join at least 10 minutes before the start. A replay will be available until the announcement of Q3 FY2025 results.

Synopsys and Intel Foundry have announced a major collaboration on angstrom-scale chip designs for Intel 18A and 18A-P technologies. The partnership features production-ready EDA flows and the industry's broadest IP portfolio, optimized for Intel's advanced process nodes.

Key developments include:

• Production-ready digital and analog EDA flows for Intel 18A and 18A-P technologies
• Early design technology co-optimization for Intel 14A-E
• Enhanced multi-die design capabilities through Intel's EMIB-T packaging technology
• Broad IP portfolio supporting 224G Ethernet, PCIe 7.0, UCIe, USB4, and other technologies

Synopsys has joined the Intel Foundry Accelerator Design Services Alliance and the new Intel Foundry Accelerator Chiplet Alliance, strengthening their ecosystem partnership. The collaboration aims to accelerate the development of high-performance AI and HPC chip designs, leveraging Intel's PowerVia backside power delivery and RibbonFET Gate-all-around transistor architecture.

Synopsys (SNPS) has announced an expanded collaboration with TSMC to deliver advanced EDA and IP solutions for TSMC's cutting-edge processes. The partnership focuses on certified digital and analog flows for TSMC A16™ and N2P processes, powered by Synopsys.ai.

Key developments include early collaboration on TSMC A14 process, support for 3Dblox and TSMC's CoWoS® technologies enabling 5.5x reticle size packages, and a comprehensive IP portfolio offering the lowest power consumption on TSMC's N2/N2P processes. The collaboration features complete IP solutions for advanced standards like HBM4, 1.6T Ethernet, UCIe, PCIe 7.0, and UALink.

The partnership enhances 3DIC Compiler capabilities, supporting ultra-high-density interconnects and increased productivity for multi-die designs. The solution integrates multi-physics analysis and Ansys simulation technologies for comprehensive power, thermal, and signal integrity analysis.

Synopsys (SNPS) announced significant advancements in chip design acceleration through collaboration with NVIDIA, showcasing up to 30x projected performance gains using the NVIDIA Grace Blackwell platform. The announcement, made at the GTC global AI conference, highlights optimization across multiple Synopsys solutions:

- Circuit Simulation: PrimeSim SPICE workloads projected to achieve 30x speedup
- Computational Lithography: Proteus software expected to accelerate simulations by up to 20x
- TCAD Simulation: Sentaurus solution projected to accelerate results up to 10x
- Materials Engineering: QuantumATK delivering up to 100x faster results

The company is expanding support for NVIDIA Grace CPU architecture, enabling more than 15 Synopsys solutions in 2025. Additionally, the integration of NVIDIA NIM inference microservices with Synopsys.ai Copilot is projected to enable 2x faster time-to-information in generative AI-powered chip design.

Synopsys (SNPS) announced its annual SNUG Silicon Valley conference, scheduled for March 19-20, 2025, at the Santa Clara Convention Center. The event will feature high-profile keynotes from industry leaders, including Synopsys CEO Sassine Ghazi and a virtual appearance by Microsoft CEO Satya Nadella discussing 'Re-engineering Engineering.'

The conference includes a fireside chat between Arm CEO Rene Haas and Ghazi on 'Sustainable Computing,' and a keynote by OpenAI's Head of Hardware Richard Ho on 'Scaling Computing for the Age of Intelligence.' The event will host over 100 sessions with presentations from major tech companies including AWS, GlobalFoundries, Microsoft, Samsung, and TSMC.

A new addition this year is the invite-only Synopsys Executive Forum on March 19, bringing together leaders from prominent companies like AMD, Intel, Meta, NVIDIA, and others to discuss silicon and systems design challenges.

Synopsys (SNPS) and Vector Informatik have announced a strategic collaboration to accelerate software-defined vehicle (SDV) development. The partnership aims to deliver pre-integrated solutions combining Vector's software factory expertise with Synopsys' electronics digital twins capabilities.

The collaboration focuses on enabling automotive companies to 'shift-left' software validation and improve developer productivity through:

• Advancement of the open-source library SIL Kit for vehicle-level digital twins
• Integration of Vector's MICROSAR embedded software and CANoe with Synopsys Silver and Virtualizer Development Kits (VDKs)
• Creation of ready-to-use virtual electronic control units (vECUs) for SDV architecture

The joint solution addresses increasing software complexity in automotive development, supports more vehicle platforms and variants, and aims to reduce development costs while enhancing software quality from early compliance verification to over-the-air updates.