Welcome to our dedicated page for Synopsys news (Ticker: SNPS), a resource for investors and traders seeking the latest updates and insights on Synopsys stock.
Synopsys Inc (NASDAQ: SNPS) drives innovation in electronic design automation (EDA) and semiconductor IP solutions, enabling next-generation chip and system development. This dedicated news hub provides investors and industry professionals with official announcements, strategic updates, and market insights directly from Synopsys leadership.
Comprehensive Coverage: Access timely updates including quarterly earnings reports, product launch details, technology partnerships, and executive commentary. Our curated collection features verified press releases covering critical developments in EDA software advancements, silicon IP licensing agreements, and software security innovations.
Strategic Resource: Track Synopsys' role in shaping semiconductor design trends through acquisitions, R&D milestones, and industry collaborations. Stay informed about developments impacting automotive electronics, AI hardware acceleration, and cloud-based design tools—key growth areas in modern computing infrastructure.
Bookmark this page for immediate access to Synopsys' latest corporate communications and technology announcements. Check regularly for updates that matter to semiconductor investors, engineering professionals, and technology analysts worldwide.
Synopsys (SNPS) has announced the launch of Virtualizer Native Execution on Arm-based hardware, a significant advancement in software development for edge devices. This innovation accelerates virtual prototype execution and deployment, particularly benefiting the automotive, high-performance computing (HPC), and Internet of Things (IoT) sectors.
The solution leverages instruction set architectures (ISAs) between Arm-based servers and edge devices, enabling faster software development through common toolchains and integration into CI/CD pipelines. Key benefits include significantly increased simulation execution speeds, early software development capabilities through extensive model libraries, and accelerated application-level performance analysis through hybrid prototyping with Synopsys ZeBu systems.
The platform supports various Arm-based infrastructures including Ampere, AWS, Google, Microsoft, and Nvidia, allowing developers to optimize compute resources either in the cloud or on-premise. The solution is immediately available and aims to transform product development from silicon to systems.
Synopsys (SNPS) has received Phase 1 clearance from the U.K. Competition and Markets Authority (CMA) for its proposed acquisition of Ansys, subject to previously announced divestitures. The company continues to work on securing regulatory approvals in other jurisdictions and maintains its expectation to close the transaction in the first half of 2025.
Synopsys president and CEO Sassine Ghazi highlighted customer support for the pending acquisition, emphasizing that the merger will enable the development of new AI-powered design solutions combining electronics and physics capabilities to enhance R&D innovation.
Synopsys (SNPS) reported Q1 FY2025 results with revenue of $1.455 billion, slightly down from $1.511 billion in Q1 FY2024 but exceeding guidance midpoint. GAAP earnings were $1.89 per diluted share (net income $295.7M), compared to $2.82 (net income $437.5M) year-over-year. Non-GAAP earnings reached $3.03 per share (net income $473.2M), versus $3.38 (net income $525.5M) in Q1 FY2024.
The company reaffirmed its full-year 2025 guidance, expecting double-digit revenue growth. Following the sale of its Software Integrity business on September 30, 2024, Synopsys now operates through two segments: Design Automation and Design IP. The company highlighted strong design activity at advanced nodes and expanded generative AI capabilities in EDA.
Synopsys (SNPS) and the SEMI Foundation have signed a Memorandum of Understanding to address workforce development in the semiconductor chip design sector. The collaboration aims to tackle the predicted need for over one million additional semiconductor jobs by 2030, equivalent to 100,000 jobs annually.
The partnership will focus on developing education and training programs with academic institutions and industry experts, targeting K-12 students, academic institutions, and military veterans. Through Synopsys' SARA (Synopsys Academic & Research Alliances) program, the initiative will provide access to cutting-edge technologies and support universities in building a diverse semiconductor workforce.
The first program, launching in 2025, will concentrate on training students, educators, and military service members transitioning to civilian careers to expand participation in the chip design sector.
Synopsys has expanded its hardware-assisted verification (HAV) portfolio with new HAPS-200 prototyping and ZeBu-200 emulation systems, powered by AMD Versal Premium VP1902 adaptive SoC. The new systems offer significant improvements in performance and capabilities:
The HAPS-200 prototyping system delivers industry-leading runtime performance with 4X improved debug performance over HAPS-100, supporting up to 10.8 billion gates. The ZeBu-200 emulation system provides up to 2X higher runtime performance compared to its predecessor, with capacity up to 15.4 billion gates.
The systems are built on Synopsys EP-Ready Hardware platform, allowing flexible configuration between emulation and prototyping use-cases. ZeBu Server 5 now scales beyond 60 billion gates for complex SoC and multi-die designs. The company's hybrid technology with Synopsys Virtualizer now supports multi-threading, enabling Android boot in under 10 minutes.
Synopsys (SNPS) has scheduled its first quarter fiscal year 2025 earnings release for Wednesday, February 26, 2025, after market close. The company will host a conference call at 2:00 p.m. Pacific Time / 5:00 p.m. Eastern Time to discuss financial results and business outlook.
Financial information will be available on the corporate investor website before the call. A live webcast will be accessible to participants, who are advised to join at least 10 minutes before the start. A replay of the webcast will be available from approximately 5:00 p.m. PT on February 26 until the company's second quarter fiscal year 2025 results announcement in May 2025.
Synopsys (SNPS) has announced its annual SNUG Silicon Valley user group conference, scheduled for March 19-20, 2025, at the Santa Clara Convention Center. The event will feature over 100 technical sessions focused on chip and system design, with participation from major sponsors including AWS, GlobalFoundries, Microsoft, Samsung, and TSMC.
This year introduces the inaugural Synopsys Executive Forum, an invite-only event running parallel to SNUG on March 19. CEO Sassine Ghazi will deliver a keynote address on engineering challenges in the era of pervasive intelligence. The Executive Forum will include discussions on automotive engineering reinvention, custom AI silicon, AI agents' productivity, and quantum computing potential, featuring a special session on sustainable computing with Arm CEO Rene Haas.
Synopsys announced that the European Commission (EC) has approved its proposed acquisition of Ansys in Phase 1, marking significant progress in obtaining regulatory clearances. The company highlighted recent developments including the UK CMA's provisional acceptance of remedies for Phase 1 approval and the expiration of the U.S. HSR Act waiting period.
The company is actively working with the FTC on proposed remedies review, while China SAMR has officially accepted their filing. The merger aims to address growing customer demands for integrated EDA and Simulation and Analysis (S&A) software solutions. Synopsys maintains its expectation to close the transaction in the first half of 2025, citing strong customer support for the merger.
Synopsys has received provisional acceptance from the UK Competition and Markets Authority (CMA) for its proposed remedies in Phase 1 regarding its planned acquisition of Ansys. This development avoids a referral to Phase 2 review. The company reports strong customer support for the transaction and emphasizes that the merger will enhance innovation across industries by integrating Electronic Design Automation (EDA) with Simulation and Analysis (S&A) software solutions. The transaction is expected to close in the first half of 2025.
Ansys (NASDAQ: ANSS) and Synopsys (NASDAQ: SNPS) have announced an agreement to sell Ansys's PowerArtist business to Keysight Technologies (NYSE: KEYS). PowerArtist is a specialized RTL design-for-power platform used for early-stage power analysis and reduction in semiconductor designs.
The sale is contingent upon regulatory approvals and the closing of Synopsys' proposed acquisition of Ansys, expected in the first half of 2025. The divestiture was deemed necessary to obtain regulatory approval for the Synopsys-Ansys merger. The transaction's financial terms were not disclosed, though Ansys stated it's not material to their financials.
PowerArtist will complement Keysight's existing design engineering software portfolio, furthering their strategy in the high-performance system design and simulation software sector. During the transition period, Ansys will continue offering PowerArtist as part of its product line.