Welcome to our dedicated page for Synopsys news (Ticker: SNPS), a resource for investors and traders seeking the latest updates and insights on Synopsys stock.
Synopsys Inc. reports developments across electronic design automation, semiconductor intellectual property, silicon design, simulation and analysis solutions, and design services. Company news commonly covers AI-powered design flows, hardware-assisted verification, interface IP, multiphysics simulation, digital twin capabilities, and engineering software that supports chip, system, and product development.
Recurring updates also include customer and ecosystem work with semiconductor foundries, processor and GPU platforms, cloud infrastructure, aerospace programs, and other engineering users. Financial news centers on earnings releases, business outlook commentary, share repurchase activity, and the integration of Synopsys and Ansys technologies within the company’s expanded silicon-to-systems portfolio.
Synopsys, Inc. (Nasdaq: SNPS) announced the promotion of Shankar Krishnamoorthy to General Manager of the Digital Design Group. A veteran with 25 years of experience in electronic design automation, Krishnamoorthy previously served as Senior Vice President of the Digital Implementation group, leading innovations like Fusion Compiler™ and TestMAX®. His leadership is expected to enhance Synopsys' technology and customer momentum. COO Sassine Ghazi praised Krishnamoorthy's contributions to digital design over the past three years.
Synopsys (Nasdaq: SNPS) announced that Graphcore successfully achieved first-pass silicon for its Colossus MK2 GC200 Intelligence Processing Unit (IPU), utilizing Synopsys' IC Compiler II. This advanced AI processor, built on a 7nm process technology, features over 59 billion transistors and 1,472 independent processor cores. The collaboration highlights Synopsys' leadership in digital design solutions, enhancing performance, power, and area metrics significantly. Graphcore's success emphasizes the capabilities of Synopsys' tools in handling complex AI designs, reinforcing their market position.
On October 8, 2020, Synopsys (Nasdaq: SNPS) announced its DesignWare CXL Controller IP now supports the AMBA CXS protocol. This enhancement facilitates efficient integration with Arm's Neoverse Coherent Mesh Network, ideal for high-performance computing and data center SoCs. Key features include support for all CXL protocol types, operating speeds of 32GT/s, and a comprehensive CXL IP solution with configurable controllers and verification IP. This development aims to meet the growing demand for high-bandwidth, low-latency communication across Arm-based systems.
Synopsys (Nasdaq: SNPS) is set to host its inaugural Digital Design Technology Symposium on October 14, 2020, from 9:00 a.m. to 2:00 p.m. Pacific. The event aims to present Synopsys' Fusion Design Platform solutions, catering to digital designers, engineering management, CAD managers, and SoC architects. Attendees will gain insights from R&D experts on advancements in areas like machine learning, low power, and silicon lifecycle management, enhancing productivity and quality in chip design. Notable presenting companies include AMD, Nvidia, and Microsoft.
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On September 28, 2020, Synopsys (Nasdaq: SNPS) announced that Arun Venkatachar will join a panel at the virtual 2020 AI Hardware Summit on September 29 at 11 a.m. Pacific. The panel will discuss how AI can transform chip design, potentially reducing costs and enhancing product quality. Synopsys will also host a roundtable on September 30 at 10:15 a.m., led by Stelios Diamantidis, to delve deeper into AI applications in chip design. The summit will feature industry leaders sharing insights on AI hardware innovations.
Synopsys (Nasdaq: SNPS) has announced a collaboration with GLOBALFOUNDRIES to enhance performance, power, and area (PPA) for their 12LP, 12LP+, and 22FDX platforms. The partnership aims to optimize the Fusion Compiler's capabilities, providing up to 18% better PPA and twice as fast results. This collaboration targets sectors such as aerospace, automotive, and IoT, accelerating product development and addressing design complexities. The Fusion Compiler utilizes advanced technologies, integrating PrimeTime voltage-scaling and StarRC signoff extraction for efficient design implementation.
Synopsys (Nasdaq: SNPS) announced a collaboration with GLOBALFOUNDRIES (GF) to develop a comprehensive portfolio of DesignWare IP for GF's advanced 12LP+ FinFET solution. This partnership will enhance high-bandwidth connectivity for cloud computing and AI applications. The 12LP+ technology delivers a 20% improvement in logic performance and a 10% reduction in logic area compared to the previous 12LP solution. DesignWare IP components will be available throughout 2020 and early 2021 to support various applications, including high-performance computing and aerospace.
Synopsys, Inc. (Nasdaq: SNPS) announced that NSITEXE successfully developed five specialized custom processors using Synopsys' ASIP Designer Tool. This innovation allowed NSITEXE to optimize its automotive data flow processor (DFP) architecture and complete the design in half the time compared to traditional methods. The ASIP Designer Tool automatically generated SDKs and aided in the rapid setup of a virtual prototype, meeting tight deadlines and enhancing performance. This partnership showcases the effectiveness of ASIP Designer in addressing complex automotive application requirements.
On September 15, 2020, Synopsys (Nasdaq: SNPS) released the BSIMM11 study, showcasing evolving software security practices across 130 organizations. This version highlights organization shifts toward DevSecOps, emphasizing automated governance in security initiatives. The study documents the input from 8,457 security professionals, supporting over 490,000 developers. Key trends include engineering-led security integration into DevOps, a transition from high-friction security processes to automated ones, and a new focus on the FinTech vertical.