Welcome to our dedicated page for Synopsys news (Ticker: SNPS), a resource for investors and traders seeking the latest updates and insights on Synopsys stock.
Synopsys Inc. reports developments across electronic design automation, semiconductor intellectual property, silicon design, simulation and analysis solutions, and design services. Company news commonly covers AI-powered design flows, hardware-assisted verification, interface IP, multiphysics simulation, digital twin capabilities, and engineering software that supports chip, system, and product development.
Recurring updates also include customer and ecosystem work with semiconductor foundries, processor and GPU platforms, cloud infrastructure, aerospace programs, and other engineering users. Financial news centers on earnings releases, business outlook commentary, share repurchase activity, and the integration of Synopsys and Ansys technologies within the company’s expanded silicon-to-systems portfolio.
On October 20, 2020, Synopsys (SNPS) launched its latest IC Validator physical verification solution, featuring innovative technologies aimed at enhancing design efficiency. The new elastic CPU management technology achieves a 40% reduction in ownership costs for physical verification signoff. Additionally, machine-learning root cause analysis enables faster identification of design issues, while the Explorer LVS technology offers a 30X speed improvement in runtime. These advancements support designers in overcoming challenges associated with complex SoC designs.
Synopsys (Nasdaq: SNPS) has launched SaberEXP, a virtual prototyping solution designed to enhance power electronics system design. This tool aims to streamline the development process by allowing early validation of designs, thereby reducing costs and improving product quality. The power electronics market is expected to grow at a 15% CAGR from 2020 to 2030, driven by the electrification trends in automotive, aerospace, and industrial sectors. SaberEXP offers fast simulation convergence and integrates seamlessly with SaberRD for comprehensive system designs.
On October 14, 2020, Synopsys and Samsung Foundry unveiled a validated automotive reference flow aimed at streamlining system-on-chip (SoC) design for ASIL D compliance in autonomous driving and ADAS applications. This flow enhances in-system testing, verification, and physical signoff while addressing challenges posed by ISO 26262 compliance. Key features include functional safety verification, fault analysis, and a comprehensive toolkit that accelerates SoC-level safety assessments. The collaboration seeks to improve productivity and achieve high-quality results for automotive safety-critical projects.
Synopsys, Inc. (Nasdaq: SNPS) has announced a collaboration with SiMa.ai aimed at enhancing machine learning inference for embedded edge applications. SiMa.ai will utilize key Synopsys products, including DesignWare IP and the Fusion Design Platform, to develop its MLSoC platform for computer vision tasks like autonomous driving. The partnership leverages Synopsys' expertise in functional safety and proven solutions to meet ISO 26262 standards. This collaboration is expected to significantly improve power efficiency, achieving over 30x better compute-power efficiency compared to alternatives.
On Oct. 13, 2020, Synopsys announced successful system-level interoperability between its DesignWare IP for PCI Express 5.0 and Intel's upcoming Xeon Scalable processors. This collaboration marks a significant advancement, allowing developers to utilize the proven technologies in high-performance computing and AI applications. The DesignWare IP boasts the industry's lowest latency and highest throughput, with over 100 licenses issued across key markets. Intel's processors promise enhanced performance and throughput, catering to emerging demands in AI and analytics.
On Oct. 12, 2020, Synopsys unveiled its Silicon Lifecycle Management (SLM) platform, a data-analytics-driven solution for optimizing SoCs throughout their lifecycle. This platform will enhance performance, reliability, and security, targeting industries such as data centers and automotive. The SLM platform promises potential financial benefits worth billions by addressing critical chip performance issues and providing actionable insights from on-chip data. Synopsys aims to lead in chip design and manufacturing while supporting ongoing optimization for improved operational efficiency.
Synopsys, Inc. (Nasdaq: SNPS) announced the promotion of Shankar Krishnamoorthy to General Manager of the Digital Design Group. A veteran with 25 years of experience in electronic design automation, Krishnamoorthy previously served as Senior Vice President of the Digital Implementation group, leading innovations like Fusion Compiler™ and TestMAX®. His leadership is expected to enhance Synopsys' technology and customer momentum. COO Sassine Ghazi praised Krishnamoorthy's contributions to digital design over the past three years.
Synopsys (Nasdaq: SNPS) announced that Graphcore successfully achieved first-pass silicon for its Colossus MK2 GC200 Intelligence Processing Unit (IPU), utilizing Synopsys' IC Compiler II. This advanced AI processor, built on a 7nm process technology, features over 59 billion transistors and 1,472 independent processor cores. The collaboration highlights Synopsys' leadership in digital design solutions, enhancing performance, power, and area metrics significantly. Graphcore's success emphasizes the capabilities of Synopsys' tools in handling complex AI designs, reinforcing their market position.
On October 8, 2020, Synopsys (Nasdaq: SNPS) announced its DesignWare CXL Controller IP now supports the AMBA CXS protocol. This enhancement facilitates efficient integration with Arm's Neoverse Coherent Mesh Network, ideal for high-performance computing and data center SoCs. Key features include support for all CXL protocol types, operating speeds of 32GT/s, and a comprehensive CXL IP solution with configurable controllers and verification IP. This development aims to meet the growing demand for high-bandwidth, low-latency communication across Arm-based systems.
Synopsys (Nasdaq: SNPS) is set to host its inaugural Digital Design Technology Symposium on October 14, 2020, from 9:00 a.m. to 2:00 p.m. Pacific. The event aims to present Synopsys' Fusion Design Platform solutions, catering to digital designers, engineering management, CAD managers, and SoC architects. Attendees will gain insights from R&D experts on advancements in areas like machine learning, low power, and silicon lifecycle management, enhancing productivity and quality in chip design. Notable presenting companies include AMD, Nvidia, and Microsoft.