Welcome to our dedicated page for Synopsys news (Ticker: SNPS), a resource for investors and traders seeking the latest updates and insights on Synopsys stock.
Synopsys Inc. reports developments across electronic design automation, semiconductor intellectual property, silicon design, simulation and analysis solutions, and design services. Company news commonly covers AI-powered design flows, hardware-assisted verification, interface IP, multiphysics simulation, digital twin capabilities, and engineering software that supports chip, system, and product development.
Recurring updates also include customer and ecosystem work with semiconductor foundries, processor and GPU platforms, cloud infrastructure, aerospace programs, and other engineering users. Financial news centers on earnings releases, business outlook commentary, share repurchase activity, and the integration of Synopsys and Ansys technologies within the company’s expanded silicon-to-systems portfolio.
On September 10, 2020, Synopsys announced that DSP Group selected its DesignWare ARC EM5D processor for advanced adaptive processing in the DBMC2-TWS audio codec, aimed at true wireless stereo headsets. The processor is recognized for its efficiency in control and signal processing, making it suitable for features like active noise cancellation and ambient sound control. The scalable ARC EM family offers flexibility in performance and power consumption, crucial for next-gen audio applications. The DesignWare ARC EM5D is now available for use in various DSP and control applications.
Synopsys has launched OptoCompiler, the first unified platform for photonic integrated circuit (PIC) design that merges electronic and photonic design methods. It enables faster, flexible design processes and supports electronic-photonic co-design. Key features include hierarchical design capabilities, accurate simulations, and usability enhancements. The platform aims to reduce design times significantly, as evidenced by Inphi Corporation's experience, which saw a nearly 4X reduction in layout time. Synopsys continues to invest in photonic solutions to address industry demands.
Synopsys (Nasdaq: SNPS) and Nestwave have partnered to develop a low-power geolocation solution for IoT devices. This innovation integrates Nestwave's soft core GPS technology with Synopsys' DesignWare ARC IoT Communications IP Subsystem, enhancing efficiency and reducing costs. The ARC EM9D processor powers this collaboration, offering up to 10x lower power consumption compared to existing market solutions. This advancement aims to facilitate high-accuracy GPS functionality without the need for dedicated chips, benefiting applications like asset tracking and smart cities.
Synopsys, Inc. (Nasdaq: SNPS) announced CFO Trac Pham will speak at the 19th Annual D.A. Davidson Software & Internet Virtual Conference on September 9, 2020, at 1:40 p.m. ET. A live audio webcast will be available, along with a replay post-event. This presentation can be accessed via the Synopsys investor relations page. As a leader in electronic design automation and semiconductor IP, Synopsys continues to drive innovation in software security and quality solutions.
Synopsys (Nasdaq: SNPS) has appointed Jeannine Sargent to its board of directors, effective immediately. With extensive experience in corporate strategy, engineering, and operations, she previously led Innovation and New Ventures at Flex and served as CEO of Oerlikon Solar and Voyan Technology. Sargent's background in technology and business development is expected to enhance Synopsys' capabilities in electronic design automation (EDA) and software integrity. Her education includes a chemical engineering degree from Northeastern University and executive programs at prestigious institutions.
Synopsys and Elektrobit have announced the availability of EB tresos Classic AUTOSAR software for Synopsys' ARC EM and HS Functional Safety Processors. This collaboration aims to streamline the development of automotive applications by providing a robust hardware-software platform for automotive semiconductor companies and OEMs. The solution enhances safety-critical automotive system development, reduces costs, and improves real-time response. Available now, the DesignWare ARC EM22FS Processor is complemented by planned releases of other software and processors in Q3 and Q4 of 2020.
Synopsys (Nasdaq: SNPS) announced Chelsio's adoption of its DesignWare 56G Ethernet PHY IP to enhance the development of high-speed Ethernet adapters for smart NIC and server applications. This silicon-proven IP supports data rates from 1.25 Gbps to 56 Gbps, ensuring reliable performance through continuous calibration and adaptation algorithms. Chelsio CEO Kianoosh Naghshineh emphasized the technology's reliability crucial for networking in hyperscale data centers. The DesignWare 56G Ethernet PHY IP is readily available, positioning Synopsys as a key player in high-performance computing solutions.
Synopsys (Nasdaq: SNPS) announces collaboration with TSMC to deliver certified design flows for advanced packaging solutions using the 3DIC Compiler. TSMC certifies CoWoS® and InFO design flows, enhancing productivity in complex multi-die systems. The solution integrates Ansys' RedHawk™ for chip-package analysis, improving design validation and performance. By automating processes, design schedules are significantly reduced, enabling faster product development. This initiative aims to meet growing demands for higher integration and efficiency in markets such as AI and 5G.
Synopsys (Nasdaq: SNPS) announced certification of its digital and custom design platforms by TSMC for its 3nm process technology. This certification, resulting from extensive collaboration, enhances power, performance, and area (PPA) optimization for next-gen designs. Key products include Fusion Compiler and IC Compiler II for place-and-route and PrimeTime for timing signoff. The collaboration aims to streamline SoC design and accelerate time to market, with the goal of enabling customers to leverage TSMC's advanced 3nm process confidently.
Synopsys (Nasdaq: SNPS) has launched its IC Validator physical verification solution on Microsoft Azure, successfully verifying the AMD Radeon Pro VII GPU with over 13 billion transistors in under nine hours. Utilizing AMD EPYC processors, the solution achieved up to 40% savings in compute resources, enhancing cost efficiency. This collaboration aims to support high-performance computing needs and addresses the growing complexity in silicon design. Synopsys emphasizes rapid physical signoff for its customers, leveraging Azure's scalable infrastructure for optimal performance.