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UMC and AP Memory Collaborate to Enable Advanced Power Delivery Solutions for AI and HPC Systems

Initial functional validation is complete, with system-level performance and reliability testing still ahead.

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United Microelectronics (UMC) and AP Memory announced a technology and manufacturing collaboration on power delivery for artificial intelligence and high-performance computing systems. The partnership combines UMC's deep trench capacitor manufacturing technology with AP Memory's silicon capacitor designs and system integration.

AP Memory's S-SiCap Gen2D designs completed tape-out, the chip-design handoff to manufacturing, and initial functional validation in the third quarter of 2026. System-level performance and reliability testing in substrate packages is the next step. UMC is also investing in new manufacturing capacity to support power delivery and heterogeneous integration, which combines different chip technologies.

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Positive

  • Minor pointAP Memory collaboration combines UMC's manufacturing technology with capacitor design and system integration capabilities.
  • Minor pointS-SiCap Gen2D designs completed tape-out and initial functional validation in the third quarter of 2026.
  • Minor pointNew manufacturing capacity investment supports UMC's power delivery and heterogeneous integration solutions.
  • Minor point. Forward-looking: it has not happened yet and may not happen.Potential collaboration extensions under exploration include capacitor-embedded interposers and landside capacitors.

Negative

  • Minor point. Forward-looking: it has not happened yet and may not happen.System-level performance and reliability testing in substrate packages remains the next step after initial functional validation.

Key Figures

S-SiCap Gen2D milestone: Q3 2026
S-SiCap Gen2D milestone
Q3 2026
Designs completed tape-out and initial functional validation

Key Terms

deep trench capacitor, tape-out, interposer
3 terms
deep trench capacitor technical
"UMC's deep trench capacitor (DTC) foundry technology"
A deep trench capacitor is a type of integrated circuit capacitor formed by etching narrow, deep vertical holes (trenches) into a silicon wafer and lining them with conductive and insulating layers so charge can be stored in the vertical surface area. By using the trench walls rather than only the chip surface, it delivers much higher capacitance per unit of chip area than planar capacitors, which is why it is commonly used for DRAM cells and high-density analog or decoupling capacitors; the approach requires specialized deep-etch and fill processes and can complicate wafer fabrication and thermal/mechanical behavior of the substrate.
tape-out technical
"designs completing tape-out and initial functional validation"
Tape-out is the milestone when a chip designer delivers the finalized, production-ready blueprint of a semiconductor chip to a foundry for fabrication. Think of it as handing a finished blueprint to a factory: it means design work is complete and manufacturing (with its costs and timelines) can begin. For investors, tape-out signals a clear step toward production, potential revenue, and the transition of technical risk into manufacturing and market risk.
interposer technical
"embedding capacitors directly in the interposer or substrate"
An interposer is a person or entity placed between two parties in a transaction to act as a middleman, often to handle ownership, voting rights or contract obligations on behalf of someone else. For investors, interposers matter because they can hide who really controls assets or decisions, create conflicts of interest, or introduce regulatory and legal risk—think of them as a curtain between the buyer and the true owner that can change how you assess ownership, control and transparency.

AI-generated analysis. How Rhea-AI works. Not financial advice.

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HSINCHU, Oct. 22, 2026 /PRNewswire/ -- United Microelectronics Corporation (NYSE: UMC; TWSE: 2303) ("UMC") and AP Memory (TWSE: 6531) today announced a technology and manufacturing collaboration to advance power delivery solutions for AI and high-performance computing (HPC) systems. This partnership combines UMC's deep trench capacitor (DTC) foundry technology and scalable wafer manufacturing with AP Memory's silicon capacitor designs and system-level integration to address the power efficiency challenges of next-generation data centers.

Depending on system design requirements, deep trench capacitors can be integrated into the interposer, substrate, or landside in an advanced package to support power integrity needs of AI and HPC systems.

Rapid scaling of AI workloads is placing unprecedented demands on power delivery within computing systems, driving an architecture shift in data center design from placing power stabilization components on the circuit board to embedding capacitors directly in the interposer or substrate. This innovative approach shortens the power delivery path, improves power integrity, and supports more efficient voltage regulation within advanced packages.

The collaboration reached a significant milestone in the third quarter of 2026, with AP Memory's S-SiCap™ Gen2D discrete silicon capacitor designs completing tape-out and initial functional validation. The next step is to proceed to comprehensive system-level performance and reliability testing of capacitors in substrate packages, targeting support for a range of capacitance and operating voltage requirements. UMC and AP Memory are also exploring opportunities to extend the collaboration to other product lines including capacitor-embedded interposers and landside capacitors to address diverse system designs.

GC Hung, Senior Vice President of UMC, said: "The growth of AI and HPC is driving a fundamental shift in power delivery – from board-level towards increasingly vertical power integration on the chip-level. UMC is offering robust power delivery solutions, including our DTC technology, which enables high-density capacitance to be placed closer to the computing die for more stable power delivery. By partnering with AP Memory, we are helping to bring scalable solutions to the market to solve the critical power bottleneck challenges as AI infrastructure continues to evolve."

Ivan Hong, President of AP Memory, said: "The successful tape-out and initial wafer validation of our customized S-SiCap™ products using DTC technology represents an important milestone in demonstrating the flexibility and manufacturability of AP Memory's S-SiCap™ design. By working with UMC, we are providing our customers a total solution, from product design to wafer manufacturing."

UMC's power delivery solutions roadmap covers both discrete and embedded silicon capacitors that can be applied to different system architectures, and extends to active components such as internal voltage regulators. UMC is also leveraging its advanced packaging capabilities to enable higher-density integration of power components to meet the higher voltage and capacitance requirements of next-generation data centers. In parallel, UMC is further investing in new manufacturing capacity to support both power delivery and heterogeneous integration solutions.

About UMC

UMC (NYSE: UMC, TWSE: 2303) is a leading global semiconductor foundry company. The company provides high-quality IC fabrication services, focusing on logic and various specialty technologies to serve all major sectors of the electronics industry. UMC's comprehensive IC processing technologies and manufacturing solutions include Logic/Mixed-Signal, embedded High-Voltage, embedded Non-Volatile-Memory, RFSOI, BCD etc. Most of UMC's 12-in and 8-in fabs with its core R&D are located in Taiwan, with additional ones throughout Asia. UMC has a total of 12 fabs in production with combined capacity of more than 400,000 wafers per month (12-in equivalent), and all of them are certified with IATF 16949 automotive quality standard. UMC is headquartered in Hsinchu, Taiwan, plus local offices in United States, Europe, China, Japan, Korea & Singapore, with a worldwide total of 20,000 employees. For more information, please visit: http://www.umc.com.

Note from UMC Concerning Forward-Looking Statements

Some of the statements in the foregoing announcement are forward-looking within the meaning of the U.S. Federal Securities laws, including statements about introduction of new services and technologies, future outsourcing, competition, wafer capacity, business relationships and market conditions. Investors are cautioned that actual events and results could differ materially from these statements as a result of a variety of factors, including conditions in the overall semiconductor market and economy; acceptance and demand for products from UMC; and technological and development risks. Further information regarding these and other risks is included in UMC's filings with the U.S. Securities and Exchange Commission. UMC does not undertake any obligation to update any forward-looking statement as a result of new information, future events or otherwise, except as required under applicable law.

About AP Memory

AP Memory (TWSE: 6531) is a global fabless design semiconductor company specializing in customized memory design and IP solutions. Products include IoT memory (IoTRAM™), AI memory solutions (VHM™), and silicon capacitors (S-SiCap™). With strong R&D capabilities, AP Memory is committed to providing high performance, low-power and innovative customized products and solutions for applications such as mobile communication, wearable, IoT, high-end mobile application, high-performance computing, and edge computing.

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SOURCE United Microelectronics Corporation; AP Memory Technology Corp.

FAQ

AI-generated questions and answers. How Rhea-AI works. Not financial advice.

What milestone did UMC and AP Memory reach in their power delivery collaboration?

AP Memory's S-SiCap Gen2D discrete silicon capacitor designs completed tape-out and initial functional validation in the third quarter of 2026. The next step is system-level performance and reliability testing of capacitors in substrate packages.

What other products could UMC and AP Memory add to their collaboration?

UMC and AP Memory are exploring extensions to capacitor-embedded interposers and landside capacitors to address different system designs. These are potential extensions, rather than completed additions to the collaboration.

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