Arteris Announces Collaboration with IC-Link by imec to Accelerate Next-Gen AI and HPC Silicon

Rhea-AI Summary

Arteris (Nasdaq:AIP) announced a collaboration with IC-Link by imec to use Arteris network-on-chip (NoC) IP in developing next-generation AI and high-performance computing (HPC) chiplets and ASICs.

The partnership targets reusable, scalable architectures to reduce integration complexity, lower development risk, and speed custom semiconductor delivery.

Market reaction: AIP +10.03% on AI/HPC chiplet partnership

+10.03%

56 alerts

+10.03% News Effect

+27.6% Peak in 23 hr 58 min

+$145M Valuation Impact

$1.59B Market Cap

0.7x Rel. Volume

On the day this news was published, AIP gained 10.03%, reflecting a significant positive market reaction. Argus tracked a peak move of +27.6% during that session. Our momentum scanner triggered 56 alerts that day, indicating high trading interest and price volatility. This price movement added approximately $145M to the company's valuation, bringing the market cap to $1.59B at that time.

Data tracked by StockTitan Argus on the day of publication.

Market Context

The stock surged +10.0% in the session following this news. A strong upside reaction could reflect i...

Analysis

The stock surged +10.0% in the session following this news. A strong upside reaction could reflect investors rewarding another ecosystem partnership after prior positive responses to operational wins and earnings, while an effective resale shelf and recent net insider selling may still temper enthusiasm if additional stock comes to market.

Historical Context

5 past events · Latest: Jun 24 (Positive)

Pattern 5 events

Date	Event	Sentiment	24h Move	Catalyst
Jun 24	Technology licensing deal	Positive	-0.5%	SiEngine licensed FlexNoC IP for next-generation automotive SoC platform.
May 19	Customer adoption win	Positive	+3.3%	Li Auto adopted FlexNoC 5 and Magillem for autonomous driving SoCs.
May 12	1Q26 earnings report	Positive	+9.6%	Strong Q1 growth and raised 2026 guidance with positive free cash flow outlook.
Apr 30	Innovation award	Positive	+7.1%	Cycuity Radix won a Stevie Award for Technology Innovation of the Year.
Apr 22	Earnings date notice	Neutral	+0.7%	Company scheduled Q1 2026 earnings release and conference call date.

24h Move is the share-price change in the day after each event; other market factors may also have contributed.

Pattern Detected

Recent news and earnings have more often led to positive price reactions, with only one notable divergence on operational licensing news.

Key Terms

network-on-chip, asic, chiplets, high-performance computing

4 terms

network-on-chip technical

"Arteris provides high-performance and energy-efficient, safe and secure silicon-proven network-on-chip"

A network-on-chip is the internal communication system that links many small processing and memory blocks inside a single computer chip, acting like a miniature road network that routes data between components. For investors, it matters because the design affects a chip’s speed, energy use, and ability to scale to more features—factors that influence product performance, manufacturing cost and the competitiveness of devices that use the chip.

asic technical

"service provider for ASICs and silicon photonics."

ASIC is Australia’s corporate, markets and financial services regulator that enforces rules for companies, financial advisers and market operators; think of it as the referee and rulebook keeper for financial activity. It matters to investors because ASIC’s oversight, investigations and enforcement actions affect company credibility, legal risk and market fairness—actions that can change stock prices, investor confidence and the safety of financial products.

chiplets technical

"development of next-generation AI and high-performance computing (HPC) chiplets and application specific"

Small, individual semiconductor components that are manufactured separately and then combined into a single package to perform the function of a larger chip. Like using Lego bricks instead of carving one big block, chiplets let designers mix and match proven parts to reduce cost, shorten development time, improve manufacturing yields and enable upgrades; investors watch them because they can lower production risk, boost product competitiveness and affect profit margins across the semiconductor supply chain.

high-performance computing technical

"development of next-generation AI and high-performance computing (HPC) chiplets and application"

A cluster of very powerful computers, special chips and fast networks designed to tackle huge, complex calculations far faster than a normal PC — like replacing a single delivery van with a synchronized fleet to move a city’s worth of packages. For investors, high-performance computing matters because it enables faster product development, more accurate simulations and data analysis, and new revenue streams for hardware, software and services, making firms that supply or use it potentially more competitive and scalable.

AI-generated analysis. How Rhea-AI works. Not financial advice.

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Arteris provides high-performance and energy-efficient, safe and secure silicon-proven network-on-chip (NoC) IP technology for AI ASIC with chiplet reuse and reduced time to market

CAMPBELL, Calif., July 08, 2026 (GLOBE NEWSWIRE) -- Arteris, Inc. (Nasdaq: AIP), a leading provider of semiconductor technology for accelerating innovation in the AI era, today announced a collaboration with IC-Link by imec, imec’s design and manufacturing service provider for ASICs and silicon photonics. Arteris NoC IP will be deployed as part of the ongoing effort to accelerate and simplify the development of next-generation AI and high-performance computing (HPC) chiplets and application specific integrated circuits (ASICs). By combining its subsystem expertise with Arteris NoC IP technology, IC-Link is helping customers reduce infrastructure development effort, improve design reuse, and accelerate delivery of increasingly complex custom semiconductor platforms.

As AI and HPC systems continue to increase in scale and complexity, engineering teams are looking for new ways to improve productivity and focus resources on innovation, rather than repeatedly rebuilding foundational infrastructure. By combining its subsystem expertise with Arteris technology, IC-Link provides a reusable, scalable architecture that helps customers reduce integration complexity, lower development risk, and accelerate development of next-generation custom silicon.

“As semiconductor complexity continues to grow, including in AI ASICs, engineering teams increasingly need ways to reuse proven infrastructure and focus their efforts on high-performance differentiation,” said K. Charles Janac, president and CEO of Arteris. “The collaboration between IC-Link by imec and Arteris reflects a broader industry shift toward reusable architectures that help improve productivity, reduce risk, and accelerate innovation across AI and HPC semiconductor development.”

“IC-Link’s high-speed I/O subsystem reference design represents a significant step forward in how ASIC developers targeting high-performance computing and artificial intelligence applications address the challenges of advanced node design,” said Ozgur Gursoy, director of portfolio and strategy for ASICs at IC-Link. “With each new technology node, design teams typically face costly and time-intensive rework of their I/O subsystems. By integrating Arteris’ industry-leading network-on-chip IP, our reference design reduces risk and enables HPC and AI teams to focus on what matters most: optimizing the accelerator core.”

Modern AI and HPC systems, including AI ASICs, rely on the underlying scalable semiconductor data movement infrastructure that can support growing high-performance requirements, energy efficiency, safety and security, all while managing increasing design complexity. Arteris technology helps engineering teams create efficient silicon for AI data centers, edge AI devices, and physical AI systems. Learn more at arteris.com/ai.

About Arteris

Arteris is a leading provider of semiconductor technology that accelerates the creation of high-performance, power-efficient silicon with built-in safety, reliability, and security. Innovative Arteris products are designed to optimize data movement and help ease complexity in the modern AI era with network-on-chip (NoC) interconnect intellectual property (IP), system-on-chip (SoC) software for integration automation and hardware security assurance. All are used by the world’s top technology companies to improve overall performance and engineering productivity, reduce risk, lower costs, and bring cutting-edge designs to market faster. Learn more at arteris.com.

© 2004-2026 Arteris, Inc. All rights reserved worldwide. Arteris, Arteris IP, the Arteris IP logo, and the other Arteris marks found at arteris.com/trademarks are trademarks or registered trademarks of Arteris, Inc. or its subsidiaries. All other trademarks are the property of their respective owners.

Media Contact:
Gina Jacobs
Arteris
+1 408 560 3044
newsroom@arteris.com

FAQ

What did Arteris (AIP) announce about its collaboration with IC-Link by imec on July 8, 2026?

Arteris announced a collaboration with IC-Link by imec to deploy its NoC IP in next-generation AI and HPC chiplets and ASICs. According to Arteris, the goal is to simplify development, improve design reuse, and accelerate complex custom semiconductor platforms.

How does the Arteris (AIP) and IC-Link collaboration aim to impact AI and HPC chip development?

The collaboration aims to reduce integration complexity and development risk while accelerating AI and HPC chip development. According to Arteris, combining its NoC IP with IC-Link’s subsystem expertise supports reusable, scalable architectures for advanced custom silicon.

What role does Arteris NoC IP play in the IC-Link high-speed I/O subsystem reference design?

Arteris NoC IP is integrated into IC-Link’s high-speed I/O subsystem reference design for AI and HPC ASICs. According to IC-Link, this integration helps reduce subsystem rework at advanced nodes and lets design teams focus on optimizing accelerator cores.

Why is reusable infrastructure important for AI ASIC and HPC semiconductor design, according to Arteris (AIP)?

Reusable infrastructure lets engineering teams avoid repeatedly rebuilding foundational blocks and instead focus on high-performance differentiation. According to Arteris, this supports higher productivity, reduced risk, and faster innovation across AI and HPC semiconductor development.

What types of systems can benefit from Arteris NoC technology mentioned in the July 2026 update?

Arteris technology can support AI data centers, edge AI devices, and physical AI systems needing scalable data movement. According to Arteris, its NoC IP targets high performance, energy efficiency, safety, and security amid rising design complexity.

How does the Arteris (AIP) and IC-Link partnership address advanced node design challenges for AI and HPC ASICs?

The partnership offers a reusable, scalable architecture and high-speed I/O subsystem reference design for advanced nodes. According to IC-Link, integrating Arteris NoC IP helps cut costly, time-intensive I/O subsystem rework for high-performance computing and AI applications.