Arteris Deployed by Speedata for Data Center Compute

(Neutral)

(Very Positive)

Rhea-AI Summary

Arteris (Nasdaq: AIP) reported that Speedata has deployed its FlexNoC network-on-chip IP in the Speedata Callisto Analytics Processing Unit (APU), which runs analytics and AI workloads natively in silicon. FlexNoC provides the on-chip interconnect linking compute, memory, and I/O to deliver bandwidth and scalability for large-scale data analytics workloads.

According to Arteris, FlexNoC is also an enabling technology for Speedata’s next-generation Andromeda APU, supporting efficient, secure data movement in AI data centers, edge AI devices, and physical AI systems.

News Market Reaction – AIP

+11.54%

33 alerts

+11.54% News Effect

+7.0% Peak in 10 hr 55 min

+$164M Valuation Impact

$1.58B Market Cap

0.4x Rel. Volume

On the day this news was published, AIP gained 11.54%, reflecting a significant positive market reaction. Argus tracked a peak move of +7.0% during that session. Our momentum scanner triggered 33 alerts that day, indicating elevated trading interest and price volatility. This price movement added approximately $164M to the company's valuation, bringing the market cap to $1.58B at that time.

Data tracked by StockTitan Argus on the day of publication.

Market Context

The stock surged +11.5% in the session following this news. Historical partnership coverage included...

Analysis

The stock surged +11.5% in the session following this news. Historical partnership coverage included a 10.03% 24-hour gain, providing a positive platform comparator for this deployment announcement. The active S-3 is a resale registration, while recent insider activity was net selling, a risk to monitor.

Key Figures

Announcement date: July 21, 2026

1 metrics

Announcement date July 21, 2026 Publication date

Historical Context

5 past events · Latest: Jul 14 (Positive)

Pattern 5 events

Date	Event	Sentiment	24h Move	Catalyst
Jul 14	Partnership expansion	Positive	+1.8%	Expanded Arm adoption of Cycuity Radix across next-generation processor security programs
Jul 08	AI collaboration	Positive	+10.0%	Collaboration with IC-Link by imec targeted AI and HPC chiplet development
Jun 24	Automotive licensing	Positive	-0.5%	SiEngine licensed FlexNoC for a next-generation automotive SoC platform
May 19	Vehicle adoption	Positive	+3.3%	Li Auto adopted FlexNoC 5 and Magillem for autonomous driving SoCs
May 12	Q1 earnings	Positive	+9.6%	Q1 revenue rose 39% and full-year guidance included positive free cash flow

24h Move is the share-price change in the day after each event; other market factors may also have contributed.

Pattern Detected

AIP's recent partnership and technology announcements were usually followed by positive 24-hour reactions, with one licensing announcement diverging negatively.

Key Terms

network-on-chip, etl, on-chip interconnect

3 terms

network-on-chip technical

"Arteris network-on-chip (NoC) IP supports scalable high-performance data movement"

A network-on-chip is the internal communication system that links many small processing and memory blocks inside a single computer chip, acting like a miniature road network that routes data between components. For investors, it matters because the design affects a chip’s speed, energy use, and ability to scale to more features—factors that influence product performance, manufacturing cost and the competitiveness of devices that use the chip.

etl technical

"AI Data Preparation, Agentic Analytics, and batch ETL workloads natively in silicon"

ETL stands for Extract, Transform, Load and describes the process companies use to gather data from different sources, clean and reshape it, then store it in a central system for reporting and analysis. Investors care because reliable ETL pipelines determine how quickly and accurately a business can produce financial reports, spot trends, manage risk and make decisions—like turning scattered receipts into a single, searchable ledger.

on-chip interconnect technical

"Arteris FlexNoC provides the on-chip interconnect that connects compute, memory, and I/O"

On-chip interconnect is the network of wiring, switches and protocols that links different components inside a single semiconductor chip, such as processors, memory blocks and hardware accelerators. Like the roads and traffic signals inside a city, it determines how quickly and efficiently data moves between parts of the chip, affecting speed, power consumption and how well a design scales to more functions. Investors watch it because interconnect quality influences product performance, energy use and manufacturing complexity, which can affect competitiveness and cost.

AI-generated analysis. How Rhea-AI works. Not financial advice.

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07/21/2026 - 09:00 AM

Arteris network-on-chip (NoC) IP supports scalable high-performance data movement in Speedata’s purpose-built Analytics Processing Unit (APU) for large-scale data analytics workloads

CAMPBELL, Calif., July 21, 2026 (GLOBE NEWSWIRE) -- Arteris, Inc. (Nasdaq: AIP), a leading provider of semiconductor technology for accelerating innovation in the AI era, today announced that Speedata, developer of the purpose-built Analytics Processing Unit (APU), has deployed Arteris FlexNoC technology in its Callisto processor. The Speedata APU runs Apache Spark SQL, AI Data Preparation, Agentic Analytics, and batch ETL workloads natively in silicon, delivering faster performance and lower total cost of ownership.

Organizations increasingly rely on large-scale analytics to extract insights from growing volumes of structured and unstructured data. As these workloads expand, system performance is often limited by the ability to move data efficiently throughout the system. Arteris FlexNoC provides the on-chip interconnect that connects compute, memory, and I/O across the design, delivering the bandwidth and scalability these workloads demand.

"AI inference is transforming every technology stack and industry at speed and scale, with real-time data analytics, accelerated by Speedata APU, as the catalyst. Arteris FlexNoC has been an important enabling technology across both Callisto and our next-generation Andromeda APU, giving our engineering teams the flexibility to focus on innovation in accelerated data analytics while relying on a proven interconnect foundation," said Rafi Shalom, CTO, Chief Architect & Co-founder of Speedata.

"Across all types of AI computing and data analytics infrastructure, moving high-performance data efficiently, safely, and securely has become just as important as processing it," said K. Charles Janac, president and CEO of Arteris. "As organizations work to extract value from ever-larger datasets, semiconductor innovation increasingly depends on system architectures capable of delivering efficient communication between compute resources. Speedata has developed an innovative approach to data analytics acceleration, and we're pleased our technology is helping enable that vision."

As modern analytics infrastructure depends on the efficient movement of data across increasingly complex semiconductor architectures, Arteris technology helps engineering teams effectively create new semiconductor computing for AI data centers, edge AI devices, and physical AI systems. Learn more at arteris.ai.

About Arteris
Arteris is a leading provider of semiconductor technology that accelerates the creation of high-performance, power-efficient silicon with built-in safety, reliability, and security. Innovative Arteris products are designed to optimize data movement and help ease complexity in the modern AI era with network-on-chip (NoC) interconnect intellectual property (IP), system-on-chip (SoC) software for integration automation and hardware security assurance. All are used by the world’s top technology companies to improve overall performance and engineering productivity, reduce risk, lower costs, and bring cutting-edge designs to market faster. Learn more at arteris.com.

About Speedata
Speedata is the creator of the Analytics Processing Unit (APU), the first processor purpose-built for Apache Spark SQL, AI Data Preparation, Agentic Analytics, and batch ETL analytics workloads. By executing Spark operations natively in silicon rather than memory, the APU delivers up to 100x faster performance and 90% lower total cost of ownership compared to general-purpose compute, with zero code changes required. In one enterprise AI data preprocessing deployment, that efficiency let customers replace 37 servers with just 3.

Speedata integrates directly into existing data pipelines, accelerating the most demanding analytics and AI data layer workloads at scale. Speedata's breakthrough accelerated analytics and database processors provide significant improvement in performance-per-cost for enterprises, public and sovereign cloud providers, private datacenters, and technology providers across industries. Learn more at speedata.io.

© 2004-2026 Arteris, Inc. All rights reserved worldwide. Arteris, Arteris IP, the Arteris IP logo, and the other Arteris marks found at arteris.com/trademarks are trademarks or registered trademarks of Arteris, Inc. or its subsidiaries. All other trademarks are the property of their respective owners.

Media Contact:
Gina Jacobs
Arteris
+1.408.560.3044
newsroom@arteris.com

Media Contact:
Daniela Sztulwark
Speedata
+1.917.891.1134
press@speedata.io

FAQ

What did Arteris (Nasdaq: AIP) announce about Speedata’s use of its technology on July 21, 2026?

Arteris announced that Speedata has deployed its FlexNoC network-on-chip IP in the Speedata Callisto Analytics Processing Unit. According to Arteris, FlexNoC delivers scalable on-chip connectivity for compute, memory, and I/O, supporting demanding data analytics and AI workloads in modern infrastructure.

How does Speedata’s APU use Arteris FlexNoC IP for data center compute workloads?

Speedata’s APU uses Arteris FlexNoC as the on-chip interconnect to move data between compute, memory, and I/O. According to Arteris, this architecture helps support Apache Spark SQL, AI data preparation, agentic analytics, and batch ETL workloads natively in silicon for large-scale analytics.

What workloads does Speedata’s Callisto APU, using Arteris FlexNoC, target for acceleration?

Speedata’s Callisto APU targets Apache Spark SQL, AI Data Preparation, Agentic Analytics, and batch ETL workloads for acceleration. According to Arteris, these workloads run natively in silicon, aiming to deliver faster performance and lower total cost of ownership for large-scale analytics users.

How is Arteris FlexNoC involved in Speedata’s next-generation Andromeda APU?

Arteris FlexNoC is described as an important enabling technology in Speedata’s upcoming Andromeda APU. According to Speedata’s CTO, it lets engineering teams focus on innovation in accelerated data analytics while relying on a proven, scalable interconnect foundation across their processor designs.

Why is Arteris emphasizing data movement for AI and analytics infrastructure with AIP stock?

Arteris emphasizes that efficiently moving high-performance data is as critical as processing it in AI and analytics. According to Arteris, semiconductor innovation increasingly depends on system architectures that deliver efficient communication between compute resources across AI data centers, edge AI devices, and physical AI systems.

What role does Arteris technology play in AI data centers and edge AI devices?

Arteris technology provides network-on-chip interconnects that enable efficient data movement within complex semiconductor designs. According to Arteris, these interconnects help engineering teams build new semiconductor computing platforms for AI data centers, edge AI devices, and physical AI systems that require scalable, high-bandwidth communication.