Welcome to our dedicated page for Cadence Design System news (Ticker: CDNS), a resource for investors and traders seeking the latest updates and insights on Cadence Design System stock.
Cadence Design Systems, Inc. (Nasdaq: CDNS) is a software publisher focused on electronic design automation (EDA), design IP and system design and analysis, with a strong emphasis on AI and digital twins. The CDNS news feed highlights how the company’s computational software and Intelligent System Design™ strategy support semiconductor and systems companies across hyperscale computing, mobile communications, automotive, aerospace, industrial, life sciences and robotics.
Investors and industry followers can use this page to review company announcements on financial results, including quarterly earnings releases, backlog updates, margin disclosures and business outlooks, which Cadence distributes via press releases and related 8-K filings. These updates often include commentary from senior management and details on product and maintenance revenue, services revenue and non-GAAP metrics.
Cadence news also covers technology milestones and product introductions. Examples include LPDDR5X and LPDDR6 memory IP system solutions for AI training, inference and data center workloads, as well as announcements related to memory and interface IP for standards such as HBM, DDR5, PCIe, UCIe, UALink and high-speed Ethernet. Other releases describe the company’s Chiplet Spec-to-Packaged Parts ecosystem and Physical AI chiplet platform, developed in collaboration with partners like Arm and Samsung Foundry to support chiplet-based architectures for physical AI, data center and HPC applications.
Additional news items address strategic transactions and governance, such as the acquisition of Secure-IC, the planned acquisition of Hexagon’s design and engineering business, and board appointments including Dr. Luc Van den hove. Community-focused announcements, like the Cadence Giving Foundation’s multi-year commitment to expand the AI Hub at San José State University, provide insight into the company’s engagement with education and the broader AI ecosystem.
By following CDNS news, readers can track how Cadence’s EDA tools, design IP, AI and digital twin technologies evolve, how the company communicates its financial performance, and how strategic partnerships and acquisitions shape its role in semiconductor and system design. Bookmark this page to access an organized stream of Cadence press releases and related updates.
Cadence Design Systems (CDNS) has expanded its collaboration with Samsung Foundry to enhance 3D-IC design capabilities. The Cadence Integrity 3D-IC platform now supports die-on-die stacking, optimizing power, performance, and area (PPA) for complex applications. This collaboration allows users to optimize through TSV placement in stacked die designs, mitigating traditional design challenges. It streamlines the design process by enabling planning, implementation, and signoff from a single interface, aimed at improving overall productivity.
Cadence Design Systems (CDNS) has partnered with Google Cloud to enhance semiconductor design through the Cadence Cloud Passport, offering certified cloud-ready tools. This collaboration has resulted in up to 10X improvements in design throughput and 25% performance gains on Google Cloud C2D instances versus on-premises solutions. Customers benefit from improved scalability, high-performance computing access, and reduced time-to-solution. Notably, Google silicon teams have successfully utilized Cadence tools to develop Tensor SoCs and TPUs, significantly boosting design reliability and project timelines.
Cadence Design Systems introduces the Cadence Certus Closure Solution, designed to automate the chip design closure process, reducing turnaround time from weeks to overnight. This solution features a massively parallel architecture, significantly boosting productivity by up to 10X compared to existing methodologies. The Certus Closure Solution supports essential design aspects such as 5G communications and hyperscale computing, while offering cloud readiness for extensive chip design projects. It enhances engineering productivity and integrates with existing tools for streamlined operations.
Cadence Design Systems (CDNS) will host its third quarter 2022 financial results webcast on October 24, 2022, at 2:00 p.m. Pacific Time. CEO Dr. Anirudh Devgan and CFO John Wall will participate in the event. An archived version of the webcast will be accessible from 5:00 p.m. Pacific Time on the same day until December 16, 2022. Cadence is recognized as a leader in electronic systems design, known for its Intelligent System Design strategy and has been named one of the 100 Best Companies to Work For by Fortune for eight consecutive years.
Cadence Design Systems (CDNS) has announced the certification of an 8nm RFIC design reference flow by Samsung Foundry, aimed at developing 5G RFICs for sub-6GHz to mmWave applications. This advanced design flow enhances productivity, electrical analysis, and design closure, enabling high-quality RFIC designs on the first pass. Key features of the flow include support for circuit simulation, electromagnetic-aware design, and post-layout extraction. This collaboration advances the design capabilities for customers in the growing 5G market, including smartphones and communications infrastructure.
Cadence Design Systems (NASDAQ: CDNS) has optimized its Voltus-XFi Custom Power Integrity solution for Samsung Foundry’s advanced 5LPE process technology. This certification enhances collaboration between the two companies, allowing customers to integrate advanced design software for creating integrated circuits (ICs) aimed at hyperscale computing, mobile, automotive, and AI applications. The Voltus-XFi solution offers a comprehensive workflow, ensuring high performance and low power consumption in line with emerging technology demands.
Cadence Design Systems has launched the Cadence Verisium Artificial Intelligence (AI)-Driven Verification Platform. This new suite uses big data and AI to enhance verification workloads, coverage, and the analysis of design bugs on complex System-on-Chips (SoCs). Built on the Cadence Joint Enterprise Data and AI (JedAI) Platform, Verisium optimizes multiple runs across SoC designs, improving productivity through advanced machine learning models. Initial apps include Verisium AutoTriage, SemanticDiff, and others, each focused on automating and streamlining the verification process.
Cadence Design Systems has launched the Cadence JedAI Platform, a significant advancement in electronic design automation (EDA) that integrates big data and AI to enhance productivity and optimize the design process. This platform unifies analytics across various Cadence applications, enabling engineers to manage both structured and unstructured data efficiently. It aims to facilitate quicker insights and improve key metrics such as power, performance, and area (PPA) across multiple designs. The platform supports cloud capabilities and is designed to meet the growing complexities in chip design across diverse industries.
Cadence Design Systems (NASDAQ: CDNS) has acquired OpenEye Scientific Software for approximately
FAQ
What is the current stock price of Cadence Design System (CDNS)?
What is the market cap of Cadence Design System (CDNS)?
