Cadence Design System Inc Stock Price, News & Analysis

Cadence Design Systems (CDNS) announced that Samsung Foundry has adopted the Cadence Tempus Timing Signoff Solution featuring a new SPICE-accurate aging analysis capability. This advancement aims to enhance the reliability of designs for automotive, aerospace, and consumer applications while improving power, performance, and area (PPA). The Tempus solution allows Samsung to validate designs with over 10 years of reliability, achieving up to 4.2% improved frequency and 10% better timing slack. This collaboration marks a significant step towards high-reliability device manufacturing.

Cadence Design Systems (Nasdaq: CDNS) will participate in a virtual fireside chat at the Berenberg US CEO Conference on November 9, 2021. The discussion, featuring Anirudh Devgan and John Wall, will be available live at 1:00 p.m. EST and archived on the Cadence website for replay until December 17, 2021. Cadence, a leader in electronic design, focuses on Intelligent System Design™, providing innovative solutions across various industries. For more details, visit cadence.com/cadence/investor_relations.

Cadence Design Systems announced the launch of the Tensilica HiFi 1 DSP, designed to optimize audio processing in small battery-operated devices like earbuds and smartwatches. This DSP boasts ultra-low energy consumption, enhancing battery life while enabling features like always-listening voice commands. Compared to its predecessor, the HiFi 3 DSP, this model offers 11-16% smaller footprint and up to 73% greater energy efficiency. The new DSP is available now and supports Cadence’s Intelligent System Design strategy, catering to the emerging demand in wearables and hearables.

Cadence Design Systems (CDNS) has collaborated with TSMC to enhance 3D-IC multi-chiplet design innovations. The Integrity 3D-IC platform, the first unified system for 3D-IC planning and analysis, now supports TSMC's 3DFabric technologies, improving engineering productivity and design turnaround time. Additionally, the Tempus Timing Signoff Solution and the Voltus IC Power Integrity Solution are optimized for robustness in design. This partnership aims to enable competitive advancements in hyperscale computing, mobile, and automotive applications.

Cadence Design Systems (Nasdaq: CDNS) reported a strong third quarter of 2021 with revenue of $751 million, up from $667 million in Q3 2020. The company achieved a GAAP operating margin of 26% and net income of $176 million, or $0.63 per diluted share. Non-GAAP results showed an operating margin of 36% and net income of $222 million, or $0.80 per diluted share. For Q4 2021, revenue is projected between $745 million and $765 million, with an annual revenue forecast of $2.96 billion to $2.98 billion.

Cadence Design Systems (CDNS) announces the certification of its digital and custom/analog flows for TSMC's N3 and N4 process technologies. This collaboration accelerates innovation in mobile, AI, and hyperscale computing. Joint customers have validated the benefits through successful tapeouts using the new process design kits (PDKs). The integrated RTL-to-GDS flow optimizes power, performance, and area (PPA), enabling efficient large library processing, accurate timing analysis, and precise power signoff for N3 and N4 technologies, thus improving productivity for advanced designs.

Cadence Design Systems (CDNS) announces the availability of PCIe 6.0 IP on TSMC's N5 process, featuring a DSP-based PHY and advanced controller for enhanced performance in hyperscale computing and 5G applications. The PCIe 6.0 PHY test chip showcased excellent electrical performance and low jitter, accommodating harsh conditions. The controller supports high throughput with low latency, achieving 128Gbps bandwidth. Early adopters can access design kits now, with a test chip tape-out completed in July 2021. This supports Cadence's Intelligent System Design strategy, affirming its position as a leader in electronic design.