Welcome to our dedicated page for Cadence Design System news (Ticker: CDNS), a resource for investors and traders seeking the latest updates and insights on Cadence Design System stock.
Cadence Design Systems, Inc. (Nasdaq: CDNS) is a software publisher focused on electronic design automation (EDA), design IP and system design and analysis, with a strong emphasis on AI and digital twins. The CDNS news feed highlights how the company’s computational software and Intelligent System Design™ strategy support semiconductor and systems companies across hyperscale computing, mobile communications, automotive, aerospace, industrial, life sciences and robotics.
Investors and industry followers can use this page to review company announcements on financial results, including quarterly earnings releases, backlog updates, margin disclosures and business outlooks, which Cadence distributes via press releases and related 8-K filings. These updates often include commentary from senior management and details on product and maintenance revenue, services revenue and non-GAAP metrics.
Cadence news also covers technology milestones and product introductions. Examples include LPDDR5X and LPDDR6 memory IP system solutions for AI training, inference and data center workloads, as well as announcements related to memory and interface IP for standards such as HBM, DDR5, PCIe, UCIe, UALink and high-speed Ethernet. Other releases describe the company’s Chiplet Spec-to-Packaged Parts ecosystem and Physical AI chiplet platform, developed in collaboration with partners like Arm and Samsung Foundry to support chiplet-based architectures for physical AI, data center and HPC applications.
Additional news items address strategic transactions and governance, such as the acquisition of Secure-IC, the planned acquisition of Hexagon’s design and engineering business, and board appointments including Dr. Luc Van den hove. Community-focused announcements, like the Cadence Giving Foundation’s multi-year commitment to expand the AI Hub at San José State University, provide insight into the company’s engagement with education and the broader AI ecosystem.
By following CDNS news, readers can track how Cadence’s EDA tools, design IP, AI and digital twin technologies evolve, how the company communicates its financial performance, and how strategic partnerships and acquisitions shape its role in semiconductor and system design. Bookmark this page to access an organized stream of Cadence press releases and related updates.
Cadence Design Systems announces the qualification of its Integrity 3D-IC platform by Samsung Foundry, enabling advanced 2D-to-3D partitioning for improved power, performance, and area (PPA) in chip design. This solution automates the creation of memory-on-logic configurations for hyperscale computing, mobile, automotive, and AI applications. The platform enhances 3D stacking by reducing memory latency and wirelength, thus boosting CPU performance and facilitating comprehensive system analysis.
Cadence Design Systems (NASDAQ: CDNS) announced that Samsung Foundry has successfully utilized its Liberate Trio Characterization Suite to enhance the efficiency of 3nm production libraries. This advanced characterization suite expedited Samsung's time to market by improving productivity and reducing turnaround time compared to earlier nodes. Key features include a unified production-proven flow, machine learning capabilities, and cloud optimization, enabling scalable and reliable operations. The collaboration supports Cadence's Intelligent System Design strategy, enhancing design enablement across various applications.
Cadence Design Systems (CDNS) announced that Samsung Foundry has adopted the Cadence Tempus Timing Signoff Solution featuring a new SPICE-accurate aging analysis capability. This advancement aims to enhance the reliability of designs for automotive, aerospace, and consumer applications while improving power, performance, and area (PPA). The Tempus solution allows Samsung to validate designs with over 10 years of reliability, achieving up to 4.2% improved frequency and 10% better timing slack. This collaboration marks a significant step towards high-reliability device manufacturing.
Summary not available.
Cadence Design Systems (Nasdaq: CDNS) will participate in a virtual fireside chat at the Berenberg US CEO Conference on November 9, 2021. The discussion, featuring Anirudh Devgan and John Wall, will be available live at 1:00 p.m. EST and archived on the Cadence website for replay until December 17, 2021. Cadence, a leader in electronic design, focuses on Intelligent System Design™, providing innovative solutions across various industries. For more details, visit cadence.com/cadence/investor_relations.
Cadence Design Systems announced the launch of the Tensilica HiFi 1 DSP, designed to optimize audio processing in small battery-operated devices like earbuds and smartwatches. This DSP boasts ultra-low energy consumption, enhancing battery life while enabling features like always-listening voice commands. Compared to its predecessor, the HiFi 3 DSP, this model offers 11-16% smaller footprint and up to 73% greater energy efficiency. The new DSP is available now and supports Cadence’s Intelligent System Design strategy, catering to the emerging demand in wearables and hearables.
Cadence Design Systems (CDNS) has collaborated with TSMC to enhance 3D-IC multi-chiplet design innovations. The Integrity 3D-IC platform, the first unified system for 3D-IC planning and analysis, now supports TSMC's 3DFabric technologies, improving engineering productivity and design turnaround time. Additionally, the Tempus Timing Signoff Solution and the Voltus IC Power Integrity Solution are optimized for robustness in design. This partnership aims to enable competitive advancements in hyperscale computing, mobile, and automotive applications.
Cadence Design Systems (Nasdaq: CDNS) reported a strong third quarter of 2021 with revenue of $751 million, up from $667 million in Q3 2020. The company achieved a GAAP operating margin of 26% and net income of $176 million, or $0.63 per diluted share. Non-GAAP results showed an operating margin of 36% and net income of $222 million, or $0.80 per diluted share. For Q4 2021, revenue is projected between $745 million and $765 million, with an annual revenue forecast of $2.96 billion to $2.98 billion.
Summary not available.
Cadence Design Systems (CDNS) announces the certification of its digital and custom/analog flows for TSMC's N3 and N4 process technologies. This collaboration accelerates innovation in mobile, AI, and hyperscale computing. Joint customers have validated the benefits through successful tapeouts using the new process design kits (PDKs). The integrated RTL-to-GDS flow optimizes power, performance, and area (PPA), enabling efficient large library processing, accurate timing analysis, and precise power signoff for N3 and N4 technologies, thus improving productivity for advanced designs.