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SEALSQ Deepens Technology Focus on CMOS-Compatible Quantum Architectures to Enable Secure Scalable Silicon-Based Quantum Computing

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SEALSQ (NASDAQ: LAES) said it is intensifying focus on CMOS-compatible quantum architectures, prioritizing silicon spin qubits and electrons-on-helium to enable scalable, silicon-manufactured quantum processors.

The company plans co-design of quantum devices with classical CMOS control, use FDSOI for lower noise/power, and embed post-quantum cryptography and hardware trust for secure, production-ready systems.

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Market Reality Check

Price: $3.77 Vol: Volume 3,536,188 is below...
low vol
$3.77 Last Close
Volume Volume 3,536,188 is below 20-day average 6,438,504 (relative volume 0.55x), suggesting muted participation ahead of this update. low
Technical Shares at 3.77 are trading below the 200-day MA of 4.04, indicating a weakened longer-term trend into this news.

Peers on Argus

LAES was down 4.56% while momentum scanner peers like LASR and IMOS were up 2.96...
2 Up

LAES was down 4.56% while momentum scanner peers like LASR and IMOS were up 2.96% and 4.08%. With no same-direction peers in momentum and mixed moves across AIP, NVEC, POET, CEVA, and SKYT, the action appears stock-specific rather than a broad semiconductor move.

Historical Context

5 past events · Latest: Feb 23 (Positive)
Pattern 5 events
Date Event Sentiment Move Catalyst
Feb 23 HQ move & quantum hub Positive -4.6% Relocation to Pont-Rouge and >$100M quantum fund to build vertical stack.
Feb 20 Deal talks halted Neutral -1.3% Majority Quobly deal shelved in favor of potential future minority stake.
Feb 19 EeroQ investment Positive -0.8% Additional EeroQ investment supporting Quantum Made in USA and control tech.
Feb 18 PQ security collaboration Positive +0.5% Collaboration with Lattice to integrate TPM-based post-quantum cryptography.
Feb 17 Prelim FY25 results Positive +0.8% Reported 66% YoY revenue growth to $18M and strong cash position.
Pattern Detected

Recent LAES news—spanning strong revenue growth, quantum investments, and collaborations—has often been met with modest or even negative next-day moves, indicating a tendency for mixed price follow-through on positive headlines.

Recent Company History

Over the past week, LAES reported preliminary FY 2025 revenue of $18 million with 66% YoY growth, reinforced FY 2026 growth guidance, and highlighted cash above $425 million. It then announced a TPM–FPGA post-quantum collaboration, a second strategic investment in EeroQ, halted plans for a majority Quobly acquisition, and unveiled a Geneva relocation with a >$100 million Quantum Investment Fund. Today’s focus on CMOS-compatible quantum architectures extends this rapid sequence of quantum- and security-centric milestones.

Market Pulse Summary

This announcement highlights SEALSQ’s push toward CMOS-compatible, silicon-based quantum architectur...
Analysis

This announcement highlights SEALSQ’s push toward CMOS-compatible, silicon-based quantum architectures, centered on silicon spin qubits and electrons-on-helium, while embedding post-quantum cryptography into control systems. It extends a recent run of quantum, collaboration, and growth updates, including FY 2025 revenue of $18 million with 66% YoY growth and substantial cash reserves. Investors may track how these architectural choices, security integration, and existing partnerships convert into concrete products, customers, and scalable revenue over the next few years.

Key Terms

cmos-compatible, silicon spin qubits, electrons-on-helium, fdsoi, +3 more
7 terms
cmos-compatible technical
"announced an increased technology-driven focus on semiconductor CMOS-compatible quantum computing"
CMOS-compatible describes a device or design that can be made using the same widely used semiconductor manufacturing methods or that operates at the same voltage and logic standards as mainstream CMOS chips. For investors it signals easier and cheaper scaling, smoother integration into existing products and supply chains, and lower development risk — like a new part that fits straight onto an established factory assembly line or into a common power socket.
silicon spin qubits technical
"By prioritizing silicon spin qubits and electrons-on-helium platforms, SEALSQ is concentrating"
Silicon spin qubits are tiny quantum information units that use the orientation of an electron’s or nucleus’s magnetic moment inside silicon to represent 0 and 1, like a microscopic compass needle pointing one way or the other. They matter to investors because they promise a path to scalable, more easily manufactured quantum computers using existing chip-making techniques, which could reshape computing power, software markets and industries that rely on secure encryption.
electrons-on-helium technical
"while electrons-on-helium qubits use electrons above superfluid helium on a silicon chip"
Electrons-on-helium describes a very thin sheet of electrons that hover just above the surface of supercold liquid helium, held in place by electrical forces and the helium’s ultra-clean surface. Like tiny, well-behaved marbles rolling on a perfectly smooth pond, this system is prized by researchers because it offers an exceptionally pure, controllable platform for experiments and prototypes of quantum bits and ultra-sensitive sensors—technologies that could influence long-term investment opportunities in quantum computing and advanced measurement devices.
fdsoi technical
"In this context, FDSOI appears to be a strong compromise for achieving acceptable noise"
FD-SOI (Fully Depleted Silicon On Insulator) is a semiconductor technology for making computer chips that places a thin insulating layer under the active silicon so transistors use less power, switch faster, and generate less heat. For investors, FD-SOI can mean companies using it may offer more energy-efficient, higher-performance products at lower cost, which can influence competitiveness, margins and market demand much like a car maker gaining a more fuel-efficient engine.
post-quantum cryptography (pqc) technical
"Most importantly, it allows us to enable security-by-design through post-quantum cryptography (PQC)"
Post-quantum cryptography (PQC) involves developing new security methods designed to protect digital information against the future threat of powerful quantum computers. These advanced computers could potentially break current encryption techniques, making data vulnerable. For investors, PQC is important because it aims to safeguard sensitive financial and personal information in a world where quantum technology might eventually become a reality.
fpga technical
"It can also be used to secure FPGA configurations when manipulating qubits (e.g., error"
A field-programmable gate array (FPGA) is a type of computer chip whose internal wiring can be changed after it is made, allowing engineers to program custom hardware functions without designing a new chip. For investors, FPGAs matter because that flexibility lets companies quickly adapt products to new software, standards, or customer needs—like a toolbox that can be rearranged to build different machines—so demand and pricing can shift with trends in data centers, telecommunications, AI, and specialized electronics.
trusted boot technical
"Secure elements fabricated alongside or integrated with quantum control circuitry allow for trusted boot,"
Trusted boot is a process that checks and records each step of a computer or device starting up so only verified, untampered software can run. It uses built-in security hardware to measure and log every component before it loads, creating a tamper-evident trail much like a sequence of locks that each verify the next. For investors, trusted boot reduces the risk of malware, supports regulatory compliance and product integrity, and protects the value of hardware, software and cloud services by making breaches harder and easier to detect.

AI-generated analysis. Not financial advice.

Geneva, Switzerland, Feb. 24, 2026 (GLOBE NEWSWIRE) -- SEALSQ Corp (NASDAQ: LAES) ("SEALSQ" or "Company"), a company that focuses on developing and selling Semiconductors, PKI, and Post-Quantum technology hardware and software products, today announced an increased technology-driven focus on semiconductor CMOS-compatible quantum computing architectures. This strategic emphasis reflects SEALSQ’s conviction that long-term quantum scalability will be achieved through deep alignment with semiconductor technology. By prioritizing silicon spin qubits and electrons-on-helium platforms, SEALSQ is concentrating its investments on qubit technologies that can be fabricated, integrated, and scaled using established semiconductor CMOS processes and manufacturing capabilities.

Both silicon spin qubits and electrons-on-helium platforms approaches are promising for semiconductor CMOS-compatible quantum computing: silicon spin qubits use electrons in silicon and can be made with chip-making methods similar to CMOS, which may help with scaling and manufacturing, while electrons-on-helium qubits use electrons above superfluid helium on a silicon chip and can use CMOS-compatible controls, offering a low-noise alternative approach.

CMOS compatibility is not just a technology or manufacturing preference; it is a system-level enabler. Quantum processors require dense arrays of control electrodes, high-speed signal routing, cryogenic-compatible electronics, and precise calibration and monitoring infrastructure. Silicon-based quantum platforms offer a credible path to the co-design and eventual co-integration of quantum devices with classical CMOS control circuitry. In this context, FDSOI appears to be a strong compromise for achieving acceptable noise and power consumption levels. FDSOI is a wafer-level semiconductor technology that uses a thin silicon layer on an insulating layer to reduce power consumption and noise.

Carlos Moreira, Founder and CEO of SEALSQ, commented: “From our perspective, this technology alignment is a real advantage over other quantum approaches, such as superconducting or ion-trap systems. While those platforms are scientifically impressive, they often depend on specialized materials, custom fabrication steps, or complex optical and vacuum setups that do not align as naturally with mainstream semiconductor manufacturing. In contrast, silicon spin qubits and electrons-on-helium architectures are designed from the start to evolve within the semiconductor ecosystem. This alignment not only accelerates learning cycles but also ensures a smooth transition from research to production. Most importantly, it allows us to enable security-by-design through post-quantum cryptography (PQC) and hardware-based trust, positioning SEALSQ at the intersection of quantum innovation and secure manufacturing.”
  
At the same time, alongside its work on CMOS-compatible quantum hardware, SEALSQ recognizes that quantum computers must rely on strong security systems and is therefore integrating post-quantum cryptography (PQC) and hardware-based trust mechanisms directly into the system architecture. As quantum processors advance toward large-scale, silicon-manufactured platforms, security becomes a foundational architectural requirement, not an afterthought.

Post-quantum cryptography (PQC) plays a foundational role in this architecture. As quantum computing advances and increases the risk to classical public-key cryptography, SEALSQ is integrating PQC algorithms and hardware-based trust mechanisms in secure silicon to help ensure that quantum control systems, firmware updates, calibration data, and interconnect communications remain resilient against both classical and quantum-enabled attacks. This is especially critical in distributed quantum systems, where control electronics, cryogenic interfaces, and cloud-connected orchestration layers must exchange sensitive data securely. Securing these platforms involves implementing strong authentication mechanisms; it can also be used to secure FPGA configurations when manipulating qubits (e.g., error treatment algorithms).

Secure elements fabricated alongside or integrated with quantum control circuitry allow for trusted boot, device attestation, and secure key storage, ensuring that only authenticated software and authorized operators can access or modify quantum systems. This capability is essential as quantum computers transition from isolated laboratory instruments to networked, mission-critical infrastructure.

By combining CMOS-based quantum architectures with embedded post-quantum security, SEALSQ is addressing a fundamental challenge of the quantum era: ensuring that the machines designed to break today’s cryptography are themselves secure, trustworthy, and sovereign by design. This convergence of quantum physics, semiconductor engineering, and cryptographic resilience positions silicon-based quantum computing as not only scalable, but also secure enough for real-world deployment in government, industrial, and critical infrastructure environments.

About SEALSQ:
SEALSQ is a leading innovator in Post-Quantum Technology hardware and software solutions. Our technology seamlessly integrates Semiconductors, PKI (Public Key Infrastructure), and Provisioning Services, with a strategic emphasis on developing state-of-the-art Quantum Resistant Cryptography and Semiconductors designed to address the urgent security challenges posed by quantum computing. As quantum computers advance, traditional cryptographic methods like RSA and Elliptic Curve Cryptography (ECC) are increasingly vulnerable.

SEALSQ is pioneering the development of Post-Quantum Semiconductors that provide robust, future-proof protection for sensitive data across a wide range of applications, including Multi-Factor Authentication tokens, Smart Energy, Medical and Healthcare Systems, Defense, IT Network Infrastructure, Automotive, and Industrial Automation and Control Systems. By embedding Post-Quantum Cryptography into our semiconductor solutions, SEALSQ ensures that organizations stay protected against quantum threats. Our products are engineered to safeguard critical systems, enhancing resilience and security across diverse industries.

For more information on our Post-Quantum Semiconductors and security solutions, please visit www.sealsq.com.

Forward-Looking Statements
This communication expressly or implicitly contains certain forward-looking statements concerning SEALSQ Corp and its businesses. Forward-looking statements include statements regarding our business strategy, financial performance, results of operations, market data, events or developments that we expect or anticipate will occur in the future, as well as any other statements which are not historical facts. Although we believe that the expectations reflected in such forward-looking statements are reasonable, no assurance can be given that such expectations will prove to have been correct. These statements involve known and unknown risks and are based upon a number of assumptions and estimates which are inherently subject to significant uncertainties and contingencies, many of which are beyond our control. Actual results may differ materially from those expressed or implied by such forward-looking statements. Important factors that, in our view, could cause actual results to differ materially from those discussed in the forward-looking statements include SEALSQ's ability to continue beneficial transactions with material parties, including a limited number of significant customers; market demand and semiconductor industry conditions; and the risks discussed in SEALSQ's filings with the SEC. Risks and uncertainties are further described in reports filed by SEALSQ with the SEC.

SEALSQ Corp is providing this communication as of this date and does not undertake to update any forward-looking statements contained herein as a result of new information, future events or otherwise.

SEALSQ Corp.
Carlos Moreira
Chairman & CEO
Tel: +41 22 594 3000
info@sealsq.com
SEALSQ Investor Relations (US)
The Equity Group Inc.
Lena Cati
Tel: +1 212 836-9611
lcati@theequitygroup.com



FAQ

What did SEALSQ (LAES) announce on February 24, 2026 about its quantum strategy?

SEALSQ announced an increased focus on CMOS-compatible quantum architectures, prioritizing silicon spin qubits and electrons-on-helium. According to the company, this aligns quantum devices with semiconductor manufacturing and enables integrated security and control co-design for scalable systems.

How will SEALSQ’s use of FDSOI affect its CMOS-compatible quantum designs (LAES)?

FDSOI is highlighted as a compromise to reduce noise and power in control electronics for silicon quantum platforms. According to the company, FDSOI supports wafer-level integration and helps meet cryogenic, noise, and power requirements for co-integrated quantum-classical systems.

What security measures is SEALSQ (LAES) integrating into its silicon-based quantum systems?

SEALSQ is embedding post-quantum cryptography and hardware-based trust mechanisms into quantum control and firmware. According to the company, this enables trusted boot, device attestation, secure key storage, and authenticated firmware and calibration for resilient, networked quantum nodes.

Why is SEALSQ (LAES) prioritizing silicon spin qubits and electrons-on-helium over superconducting approaches?

The company says silicon approaches better align with mainstream semiconductor fabrication and scaling. According to SEALSQ, silicon spin qubits and electrons-on-helium use CMOS-compatible controls and fabrication paths, easing transition from research prototypes to volume manufacturing.

What practical benefits does SEALSQ (LAES) expect from co-integrating quantum devices with CMOS control?

Co-integration aims to enable dense control arrays, cryogenic-compatible electronics, and precise calibration in a manufacturable form. According to the company, this supports scalable production, lower noise/power footprints, and security-by-design for real-world deployments.
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