SEALSQ and Lattice Collaborate to Deliver Unified TPM-FPGA Architecture for Post-Quantum Security
Rhea-AI Summary
SEALSQ (NASDAQ: LAES) and Lattice Semiconductor announced a collaboration to integrate TPM-based post-quantum cryptography into select Lattice FPGA platforms.
The companies showcased a Proof-of-Concept unifying SEALSQ QS7001 and QVault TPM RoT with a Lattice secure FPGA, demonstrating technical feasibility and a demo at Embedded World 2026 (March 10-12).
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Key Figures
Market Reality Check
Peers on Argus
Semiconductor peers show mixed, mostly modest moves: AIP down 3.04%, CEVA down 9.71%, while NVEC, POET, and SKYT are up between 0.2% and 0.7%. This pattern does not point to a unified sector move tied to this collaboration.
Historical Context
| Date | Event | Sentiment | Move | Catalyst |
|---|---|---|---|---|
| Feb 17 | Prelim FY2025 metrics | Positive | +0.8% | Strong FY2025 revenue growth and reaffirmed FY2026 growth guidance. |
| Feb 12 | AI security vision | Positive | -4.0% | Outlined Physical AI strategy anchored in embedded post-quantum security. |
| Feb 11 | QS7001 presentation | Positive | -1.5% | Showcased QS7001 quantum-resistant secure microcontroller for new mandates. |
| Feb 06 | AI & quantum threat | Positive | +13.6% | Reinforced need for post-quantum secure infrastructure despite AI advances. |
| Feb 04 | Quantum platform talk | Positive | -4.5% | Presented sovereign root-to-quantum security platform for sensitive sectors. |
Recent quantum-security and strategy announcements have produced mixed reactions, with several seemingly positive updates followed by negative price moves and only occasional strong upside responses.
Over recent months, SEALSQ has repeatedly highlighted its post-quantum security positioning. On Feb 17, 2026 it reported FY2025 revenue of $18 million, up 66% YoY, with cash above $425 million, and the stock moved 0.78%. Earlier news emphasized QS7001 hardware root-of-trust capabilities, Physical AI security, and the importance of quantum-secure infrastructure, with price reactions ranging from -4.53% to +13.64%. Today’s Lattice collaboration fits this ongoing push to embed post-quantum security into broader semiconductor platforms.
Market Pulse Summary
This announcement highlights SEALSQ’s strategy to embed post-quantum security directly into Lattice FPGA platforms via a unified TPM-FPGA architecture. The PoC targets mission‑critical edge applications and aligns with broader industry moves like the Year of Quantum Security 2026. In context of prior QS7001 and quantum‑infrastructure updates, investors may watch for concrete design wins, standardization progress, and evidence that these collaborations scale beyond demonstrations into recurring, hardware-linked revenue.
Key Terms
post-quantum cryptography medical
fpga technical
root-of-trust technical
edge computing technical
AI-generated analysis. Not financial advice.
Geneva, Switzerland, Feb. 18, 2026 (GLOBE NEWSWIRE) --
Post-Quantum Cryptography TPM-Enabled Secure RoT PoC Showcase at Embedded World, in Nuremberg, in March 2026
SEALSQ Corp (NASDAQ: LAES) ("SEALSQ" or "Company"), a company that focuses on developing and selling Semiconductors, PKI, and Post-Quantum technology hardware and software products, today announced its collaboration with Lattice Semiconductor (NASDAQ: LSCC) to integrate TPM-based advanced post-quantum security capabilities into select Lattice FPGA solutions. This collaboration addresses the rapidly growing need for quantum-resistant technologies in mission-critical applications for edge computing and other high-stakes environments.
"This collaboration perfectly illustrates SEALSQ's strategy of extending our leadership in post-quantum security beyond direct OEM sales," said Bernard Vian, General Manager of SEALSQ. "We continue to deliver ready-to-deploy and custom secure chips directly to customers, while also leveraging our deep expertise in post-quantum hardware and flexible semiconductor design capabilities to empower strategic partners across the industry. Collaborating with Lattice allows us to bring our cutting-edge, tailored PQC protection to their FPGA platforms, accelerating the secure transition to quantum-resistant systems for a broad range of high-performance applications."
"Lattice is committed to advancing security for our customers as the industry prepares for a post-quantum future. By combining SEALSQ's QS7001 and QVault TPM based post‑quantum capabilities with Lattice's long-running leadership in secure, power‑efficient FPGA platforms, we further expand our quantum-capable portfolio of solutions that give our customers a variety of ways to achieve quantum-resilience in their designs with strong assurance and performance," said Eric Sivertson, Vice President of Security Business at Lattice Semiconductor.
A Proof-of-Concept of the FPGA-TPM solution integrates a Lattice secure FPGA with SEALSQ's PQC based QS7001and QVault TPM secure Root-of-Trust (RoT). The PoC demonstrates the technical feasibility of embedding TPM-based post-quantum cryptography directly into FPGA architectures and will serve as a foundational reference design for enhanced edge security.
By combining Lattice’s expertise in low power programmable FPGAs and recognized leadership in security with SEALSQ's specialized post-quantum capabilities, this collaboration demonstrates technical interoperability and supports broader industry efforts toward next-generation quantum-secure hardware.
This initiative aligns with the launch of the Year of Quantum Security 2026 (YQS2026) in Washington, D.C., where stakeholders from government, industry, and academia converged around a shared conclusion: quantum security is no longer theoretical, it is now an infrastructure and governance imperative. Both companies support industry efforts to advance post-quantum standards recommended by organizations such as NIST.
See Live Demonstrations at Embedded World 2026
The new post-quantum security PoC demo will be on display at Embedded World 2026 from March 10-12, 2026 in Nuremberg, Germany. Visit Lattice’s exhibit at Hall 4, Booth #528 to experience the unified FPGA-TPM architecture delivering a trusted root of resilience and crypto updatability at the edge, and hear more from Eric Sivertson during his Embedded World conference on the topic (Trusted Resilience Edge: Unified FPGA-TPM for Post-Quantum Cryptography RED & Cyber Resilience Act) on Tuesday March 10th at 5PM.
About SEALSQ:
SEALSQ is a leading innovator in Post-Quantum Technology hardware and software solutions. Our technology seamlessly integrates Semiconductors, PKI (Public Key Infrastructure), and Provisioning Services, with a strategic emphasis on developing state-of-the-art Quantum Resistant Cryptography and Semiconductors designed to address the urgent security challenges posed by quantum computing. As quantum computers advance, traditional cryptographic methods like RSA and Elliptic Curve Cryptography (ECC) are increasingly vulnerable.
SEALSQ is pioneering the development of Post-Quantum Semiconductors that provide robust, future-proof protection for sensitive data across a wide range of applications, including Multi-Factor Authentication tokens, Smart Energy, Medical and Healthcare Systems, Defense, IT Network Infrastructure, Automotive, and Industrial Automation and Control Systems. By embedding Post-Quantum Cryptography into our semiconductor solutions, SEALSQ ensures that organizations stay protected against quantum threats. Our products are engineered to safeguard critical systems, enhancing resilience and security across diverse industries.
For more information on our Post-Quantum Semiconductors and security solutions, please visit www.sealsq.com.
Forward-Looking Statements
This communication expressly or implicitly contains certain forward-looking statements concerning SEALSQ Corp and its businesses. Forward-looking statements include statements regarding our business strategy, financial performance, results of operations, market data, events or developments that we expect or anticipate will occur in the future, as well as any other statements which are not historical facts. Although we believe that the expectations reflected in such forward-looking statements are reasonable, no assurance can be given that such expectations will prove to have been correct. These statements involve known and unknown risks and are based upon a number of assumptions and estimates which are inherently subject to significant uncertainties and contingencies, many of which are beyond our control. Actual results may differ materially from those expressed or implied by such forward-looking statements. Important factors that, in our view, could cause actual results to differ materially from those discussed in the forward-looking statements include SEALSQ's ability to continue beneficial transactions with material parties, including a limited number of significant customers; market demand and semiconductor industry conditions; and the risks discussed in SEALSQ's filings with the SEC. Risks and uncertainties are further described in reports filed by SEALSQ with the SEC.
SEALSQ Corp is providing this communication as of this date and does not undertake to update any forward-looking statements contained herein as a result of new information, future events or otherwise.
| SEALSQ Corp. Carlos Moreira Chairman & CEO Tel: +41 22 594 3000 info@sealsq.com | SEALSQ Investor Relations (US)Pr The Equity Group Inc. Lena Cati Tel: +1 212 836-9611 lcati@theequitygroup.com |
FAQ
What is the SEALSQ and Lattice collaboration announced on February 18, 2026 (LAES)?
What does the FPGA-TPM Proof-of-Concept for LAES demonstrate at Embedded World 2026?
When and where will the LAES-Lattice post-quantum demo be shown at Embedded World 2026?
Which SEALSQ products are integrated with Lattice FPGAs in the joint PoC (LAES)?
How does the collaboration between LAES and Lattice address post-quantum security needs?
