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SEALSQ to Showcase at Embedded World 2026 Quantum-Resistant Chips and Advanced ASIC Innovations by IC’Alps

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SEALSQ (NASDAQ: LAES) will exhibit at Embedded World 2026 in Nuremberg, March 10–12, 2026, showcasing quantum-resistant chips, PKI/trust services, and IC’Alps ASIC design capabilities.

Highlights at Hall 5, Booth 178 include QVault TPM, QS7001 RISC-V MCU, end-to-end hardware Root of Trust and a proof-of-concept TPM-FPGA design with Lattice Semiconductor.

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News Market Reaction – LAES

+2.04%
4 alerts
+2.04% News Effect
+5.5% Peak Tracked
+$14M Valuation Impact
$711.38M Market Cap
3.57K Volume

On the day this news was published, LAES gained 2.04%, reflecting a moderate positive market reaction. Argus tracked a peak move of +5.5% during that session. Our momentum scanner triggered 4 alerts that day, indicating moderate trading interest and price volatility. This price movement added approximately $14M to the company's valuation, bringing the market cap to $711.38M at that time.

Data tracked by StockTitan Argus on the day of publication.

Key Figures

Embedded World 2026 dates: March 10–12, 2026 SEALSQ booth location: Hall 5, Booth 178 Lattice demo booth: Hall 4, Booth 528
3 metrics
Embedded World 2026 dates March 10–12, 2026 Event dates at Exhibition Centre Nuremberg
SEALSQ booth location Hall 5, Booth 178 SEALSQ and IC’Alps main exhibit at Embedded World 2026
Lattice demo booth Hall 4, Booth 528 Location for TPM-FPGA proof-of-concept demonstrations

Market Reality Check

Price: $2.77 Vol: Volume 3,821,119 vs 20-da...
normal vol
$2.77 Last Close
Volume Volume 3,821,119 vs 20-day average 5,413,740 (relative volume 0.71) ahead of the event-focused news. normal
Technical Price $3.93 is trading below the 200-day MA at $4.07, despite the product and partnership showcase news.

Peers on Argus

LAES fell 4.84% while close peers showed mixed, mostly modest moves (e.g., AIP u...
1 Up

LAES fell 4.84% while close peers showed mixed, mostly modest moves (e.g., AIP up 1.74%, SKYT down 1.49%). Momentum scanner only flagged LASR up 24.31%, suggesting LAES’s move was stock-specific rather than a sector-wide semiconductor shift.

Historical Context

5 past events · Latest: Feb 26 (Positive)
Pattern 5 events
Date Event Sentiment Move Catalyst
Feb 26 Conference presentation Positive +2.2% Announced Cantor conference appearance to present quantum security tech and roadmap.
Feb 24 Tech focus update Positive +4.0% Intensified focus on CMOS-compatible quantum architectures and secure, scalable processors.
Feb 23 HQ relocation & fund Positive -4.6% Relocation to Pont-Rouge with a Geneva Quantum Center and $100M+ investment fund.
Feb 20 Deal structure change Neutral +1.0% Ended talks for majority Quobly stake, exploring possible minority investment instead.
Feb 19 Strategic investment Positive +0.3% Additional strategic investment in EeroQ supporting Quantum Made in USA strategy.
Pattern Detected

Recent news-driven moves mostly aligned with positive quantum and strategy updates, with one notable divergence on the headquarters relocation announcement.

Recent Company History

Over recent weeks, SEALSQ has issued a series of quantum- and strategy-focused updates. These include conference participation to present its Quantum Security roadmap, an intensified focus on CMOS-compatible quantum architectures, and strategic investments such as the EeroQ partnership. The company also announced a Geneva headquarters relocation tied to a Quantum Center of Excellence and a Quantum Investment Fund of over USD 100 million, plus a shift from a planned majority Quobly acquisition toward a potential minority stake. Today’s Embedded World 2026 showcase continues this theme of highlighting post-quantum and secure semiconductor capabilities.

Market Pulse Summary

This announcement highlights SEALSQ’s plan to showcase quantum-resistant chips, secure RISC-V platfo...
Analysis

This announcement highlights SEALSQ’s plan to showcase quantum-resistant chips, secure RISC-V platforms, and ASIC design capabilities at Embedded World 2026, including a TPM-FPGA proof of concept with Lattice Semiconductor. It reinforces the company’s focus on post-quantum security, hardware Root of Trust, and secure device identities across industrial and IoT segments. Investors may watch for customer engagement, design wins emerging from the event, and how these demonstrations translate into orders or longer-term revenue contribution.

Key Terms

asic, risc-v, fpga, system-on-chip, +2 more
6 terms
asic technical
"alongside its ASIC (Application Specific Integrated Circuit) design services subsidiary IC’Alps."
ASIC is Australia’s corporate, markets and financial services regulator that enforces rules for companies, financial advisers and market operators; think of it as the referee and rulebook keeper for financial activity. It matters to investors because ASIC’s oversight, investigations and enforcement actions affect company credibility, legal risk and market fairness—actions that can change stock prices, investor confidence and the safety of financial products.
risc-v technical
"QS7001: Secure RISC-V microcontroller platform with built-in hardware Root of Trust"
A royalty-free, open instruction set architecture (ISA) that acts like a blueprint for how a computer’s brain understands and executes commands. Because it is not owned by a single company and can be freely implemented and customized, RISC‑V can lower licensing costs, speed product development, and encourage competition and supply-chain diversification—factors investors watch because they affect margins, market share, and the pace of innovation in chips and devices.
fpga technical
"FPGA (Field-Programmable Gate Array) is a reprogrammable integrated circuit"
A field-programmable gate array (FPGA) is a type of computer chip whose internal wiring can be changed after it is made, allowing engineers to program custom hardware functions without designing a new chip. For investors, FPGAs matter because that flexibility lets companies quickly adapt products to new software, standards, or customer needs—like a toolbox that can be rearranged to build different machines—so demand and pricing can shift with trends in data centers, telecommunications, AI, and specialized electronics.
system-on-chip technical
"Full-turnkey custom ASIC/SoC (System-on-Chip) development, from architecture and co-design"
A system-on-chip (SoC) is a single silicon chip that combines the main computing processor, memory, and key interfaces (like graphics, wireless radios or input/output controllers) that a device needs to run. Think of it as a compact, all-in-one engine that replaces many separate parts, saving space, power and cost. For investors, SoC design and production influence product performance, margins and supply risk, and can be a major competitive advantage in electronics markets.
root of trust technical
"QS7001: Secure RISC-V microcontroller platform with built-in hardware Root of Trust"
A root of trust is a small, tamper-resistant component inside a device or system that serves as the secure anchor for identity and data protection—think of it as a locked safe that holds the master keys and proof that the system is genuine. It matters to investors because a strong root of trust reduces the risk of hacks, supports regulatory compliance and customer confidence, and therefore can protect a product’s value and a company’s reputation.
pki financial
"Quantum Root of Trust & PKI & Trust ServicesEnd-to-end hardware-anchored device identities"
PKI (Public Key Infrastructure) is a system that creates and manages digital “keys” and electronic certificates to prove identities and secure online communications, like a bank vault and ID card for data. For investors, PKI matters because it helps prevent fraud, ensures that financial documents and trading instructions are genuine, and reduces regulatory and operational risk tied to hacked accounts or tampered disclosures.

AI-generated analysis. Not financial advice.

Geneva, Switzerland, March 02, 2026 (GLOBE NEWSWIRE) --

Discover more & book a meeting via: https://www.sealsq.com/embedded-world-2026

SEALSQ Corp (NASDAQ: LAES) (“SEALSQ” or the “Company”), a leader in semiconductors, public key infrastructure (PKI), and post-quantum technology hardware and software, today announced its participation in Embedded World 2026, alongside its ASIC (Application Specific Integrated Circuit) design services subsidiary IC’Alps. Embedded Word 2026 event will take place from March 10-12, 2026, at the Exhibition Centre Nuremberg, Germany.

Embedded World is the world’s leading trade fair for embedded systems, serving as a critical hub for the global embedded electronics industry. It brings together thousands of professionals, innovators, and decision-makers to explore cutting-edge technologies, address emerging challenges like cybersecurity and quantum threats, and drive advancements in secure hardware and trusted device identities.

This year, SEALSQ’s booth (Hall 5, Booth 178) will be themed around Formula One racing and its official partnership with the BWT Alpine Formula One Team, symbolizing the pursuit of ultimate performance, precision, and trust, qualities that define both the high-stakes world of Formula One and the secure, future-proof embedded solutions SEALSQ delivers.

Key Highlights at Hall 5, Booth 178:

  • Discover Some of the First Available Quantum Resistant Chips on the Market
    • QVault TPM: Standalone security chip with hardware-isolated key storage, secure boot, device attestation, and platform integrity verification, provides eamless integration for industrial gateways, embedded PCs, medical devices, network equipment, and more.
    • QS7001: Secure RISC-V microcontroller platform with built-in hardware Root of Trust, native PQC algorithms (NIST-selected standards), secure boot, firmware authentication, and updates. It is optimized for industrial control, smart energy, automotive ECUs, robotics, and secure IoT edge devices.
  • Quantum Root of Trust & PKI & Trust Services
    End-to-end hardware-anchored device identities, zero-touch provisioning, certificate lifecycle management, continuous attestation, secure OTA updates, and integration with AWS IoT, Azure, Matter. Enables secure scaling of large device fleets in compliance with evolving cybersecurity and post-quantum regulations.
  • ASIC & Secure ASIC Design Services via IC’Alps
    Full-turnkey custom ASIC/SoC (System-on-Chip) development, from architecture and co-design to verification, production (partner of TSMC, Intel Foundry, X-Fab, ams-OSRAM, GlobalFoundries) testing, and secure supply chain. Strengths include low-power design, high performance, miniaturization, robust IP protection, first-time-right silicon, and cost/performance feasibility studies. Secure features include hardware Root of Trust, secure boot, hardened crypto IPs, PQC readiness, targeting a variety of segments, from medical (implantable), to industrial, automotive/e-mobility, smart energy, critical infrastructure, and beyond.
  • Proof-of-Concept Collaboration with Lattice Semiconductor
    Drawing on SEALSQ’s unique expertise in post-quantum security integration, the collaboration creates a unified TPM-FPGA architecture that demonstrates how advanced PQC capabilities can be embedded at the hardware level to significantly strengthen edge security. FPGA (Field-Programmable Gate Array) is a reprogrammable integrated circuit that enables hardware functions to be adapted after manufacturing.
    This reference design highlights SEALSQ’s ability to extend quantum-resistant protection across diverse semiconductor platforms, accelerating industry adoption in alignment with emerging PQC standards (NIST, CNSA 2.0, and others). Live demonstrations will be available at the Lattice Semiconductor booth (Hall 4, Booth 528).

Visitors are warmly invited to Hall 5, Booth 178 to experience the Formula One-themed booth, meet the SEALSQ and IC’Alps teams, view live demonstrations, and explore how our solutions can secure and accelerate your next-generation embedded designs.

About SEALSQ:
SEALSQ is a leading innovator in Post-Quantum Technology hardware and software solutions. Our technology seamlessly integrates Semiconductors, PKI (Public Key Infrastructure), and Provisioning Services, with a strategic emphasis on developing state-of-the-art Quantum Resistant Cryptography and Semiconductors designed to address the urgent security challenges posed by quantum computing. As quantum computers advance, traditional cryptographic methods like RSA and Elliptic Curve Cryptography (ECC) are increasingly vulnerable.

SEALSQ is pioneering the development of Post-Quantum Semiconductors that provide robust, future-proof protection for sensitive data across a wide range of applications, including Multi-Factor Authentication tokens, Smart Energy, Medical and Healthcare Systems, Defense, IT Network Infrastructure, Automotive, and Industrial Automation and Control Systems. By embedding Post-Quantum Cryptography into our semiconductor solutions, SEALSQ ensures that organizations stay protected against quantum threats. Our products are engineered to safeguard critical systems, enhancing resilience and security across diverse industries.

For more information on our Post-Quantum Semiconductors and security solutions, please visit www.sealsq.com.

Forward-Looking Statements
This communication expressly or implicitly contains certain forward-looking statements concerning SEALSQ Corp and its businesses. Forward-looking statements include statements regarding our business strategy, financial performance, results of operations, market data, events or developments that we expect or anticipate will occur in the future, as well as any other statements which are not historical facts. Although we believe that the expectations reflected in such forward-looking statements are reasonable, no assurance can be given that such expectations will prove to have been correct. These statements involve known and unknown risks and are based upon a number of assumptions and estimates which are inherently subject to significant uncertainties and contingencies, many of which are beyond our control. Actual results may differ materially from those expressed or implied by such forward-looking statements. Important factors that, in our view, could cause actual results to differ materially from those discussed in the forward-looking statements include SEALSQ's ability to continue beneficial transactions with material parties, including a limited number of significant customers; market demand and semiconductor industry conditions; and the risks discussed in SEALSQ's filings with the SEC. Risks and uncertainties are further described in reports filed by SEALSQ with the SEC.

SEALSQ Corp is providing this communication as of this date and does not undertake to update any forward-looking statements contained herein as a result of new information, future events or otherwise.

SEALSQ Corp.
Carlos Moreira
Chairman & CEO
Tel: +41 22 594 3000
info@sealsq.com
SEALSQ Investor Relations (US)
The Equity Group Inc.
Lena Cati
Tel: +1 212 836-9611
lcati@theequitygroup.com

Press contact
SparkPR
Amy Packard Berry
amy.packardberry@sparkpr.com


FAQ

What will SEALSQ (LAES) showcase at Embedded World 2026 on March 10–12?

SEALSQ will showcase quantum-resistant chips, PKI trust services, and IC’Alps ASIC design services at Embedded World 2026. According to the company, demos include the QVault TPM, QS7001 RISC-V MCU, and a TPM-FPGA reference design with Lattice Semiconductor.

Where and when can investors meet SEALSQ (LAES) at Embedded World 2026?

Investors can visit SEALSQ in Hall 5, Booth 178, March 10–12, 2026, at Exhibition Centre Nuremberg. According to the company, the booth is Formula One–themed and offers live demos and meetings with SEALSQ and IC’Alps teams.

What are the technical highlights of SEALSQ's QVault TPM and QS7001 products?

QVault TPM and QS7001 deliver hardware-isolated key storage, secure boot, and PQC algorithms for embedded systems. According to the company, QS7001 is a secure RISC-V MCU with native NIST-selected PQC and hardware Root of Trust for industrial and automotive use.

How does SEALSQ describe its IC’Alps ASIC services relevant to shareholders and partners?

IC’Alps offers full-turnkey ASIC/SoC development from design to production with foundry partnerships and secure supply-chain focus. According to the company, strengths include low-power design, IP protection, first-time-right silicon, and PQC-ready hardened crypto IPs.

What is the scope of SEALSQ's collaboration with Lattice Semiconductor showcased at Embedded World 2026?

The collaboration demonstrates a TPM-FPGA reference design that embeds post-quantum cryptography at hardware level to strengthen edge security. According to the company, live demonstrations of the unified TPM-FPGA architecture will be at Lattice’s booth, Hall 4, Booth 528.