QuickLogic Will Demonstrate Its RadPro™ FPGA Dev Kit at HEART Conference

QuickLogic (NASDAQ: QUIK) will demonstrate its newly released RadPro FPGA Dev Kit at the 41st HEART Conference, April 13–17, 2026, in Shreveport, Louisiana.

Rhea-AI Summary

QuickLogic (NASDAQ: QUIK) will demonstrate its newly released RadPro FPGA Dev Kit at the 41st HEART Conference, April 13–17, 2026, in Shreveport, Louisiana. The kit includes QuickLogic's first U.S.-fabricated RadPro FPGA on GlobalFoundries 12nm and Aurora FPGA User Tools for RTL-to-bitstream development.

The company says the RadPro FPGA is silicon-proven, targets Defense Industrial Base evaluations, and Dev Kit shipments will be scheduled following the HEART Conference.

Argus Apr 9 session

+7.89% close to close Open Argus

Details

News Market Reaction – QUIK

In the Apr 9 session, QUIK gained 7.89%, reflecting a notable positive market reaction.

Data tracked by StockTitan Argus on the day of publication.

Market Context

The stock moved +7.9% in the session following this news. A strong positive reaction aligns with Qui...

Analysis

The stock moved +7.9% in the session following this news. A strong positive reaction aligns with QuickLogic’s recent pattern, where defense-focused and radiation-hardened FPGA milestones often saw favorable moves within 24 hours. With the first RadPro FPGA now silicon-proven and integrated with Aurora tools, investors previously reacted well to related SRH contracts and technical showcases. However, the existing $125,000,000 shelf and $20,000,000 at-the-market program could influence future equity issuance dynamics.

Key Figures

Process node: 12nm Conference booth: Booth 15 Conference edition: 41st HEART Conference +1 more

Process node

12nm

GlobalFoundries process used to fabricate the first RadPro FPGA

Conference booth

Booth 15

Location of RadPro FPGA Dev Kit demo at HEART Conference 2026

Conference edition

41st HEART Conference

Event where RadPro FPGA Dev Kit will be demonstrated

Conference dates

April 13–17, 2026

Dates of HEART Conference demonstration in Shreveport, Louisiana

Historical Context

5 past events · Latest: Mar 17

5 events

1. Mar 17

   eFPGA contract win

   24h Move

   +0.8%

   Mid-6-figure contract for high-density eFPGA Hard IP on Intel 18A.

2. Mar 04

   Conference participation

   24h Move

   +13.0%

   Plan to exhibit and present eFPGA chiplet work at GOMACTech 2026.

3. Mar 03

   Earnings and contracts

   24h Move

   +13.0%

   Q4 2025 results plus expanded SRH FPGA prime contract near $89M.

4. Feb 18

   Defense contract award

   24h Move

   +8.5%

   $13M award to advance Strategic Radiation Hardened FPGA program.

5. Feb 11

   Conference exhibition

   24h Move

   +0.7%

   Plan to exhibit eFPGA IP and chiplets at Chiplet Summit 2026.

24h Move is the share-price change in the day after each event; other market factors may also have contributed.

Key Terms

fpga, embedded fpga (efpga) hard ip, radiation hardened, asic, +4 more

8 terms

fpga technical

"Radiation Hardened RadPro FPGA Demonstration will include the Aurora FPGA User Tools"

A field-programmable gate array (FPGA) is a type of computer chip whose internal wiring can be changed after it is made, allowing engineers to program custom hardware functions without designing a new chip. For investors, FPGAs matter because that flexibility lets companies quickly adapt products to new software, standards, or customer needs—like a toolbox that can be rearranged to build different machines—so demand and pricing can shift with trends in data centers, telecommunications, AI, and specialized electronics.

embedded fpga (efpga) hard ip technical

"a developer of embedded FPGA (eFPGA) Hard IP, Radiation Hardened, Antifuse"

An embedded FPGA (eFPGA) hard IP is a pre-designed, ready-to-use block of reprogrammable logic that chip makers integrate directly into a silicon chip. Think of it as a small, built-in toolkit of configurable circuits that can be tailored after manufacture to add features, fix bugs, or optimize performance without redesigning the whole chip. For investors, eFPGA hard IP can speed time-to-market, lower redesign costs, and enhance product flexibility, affecting a chipmaker’s competitiveness, margins, and licensing opportunities.

radiation hardened technical

"Radiation Hardened RadPro FPGA Demonstration will include the Aurora FPGA User Tools"

Radiation hardened describes electronic parts or systems designed to keep working when exposed to high levels of radiation, such as from space, nuclear environments or certain medical equipment. Think of them as ruggedized devices with extra shielding and design tweaks so they don’t fail when hit by energetic particles. Investors care because these specialized components sell at higher prices, are critical for mission‑critical customers, and often command long contracts and higher barriers to competition.

asic technical

"commonly used by the DIB for radiation hardened ASICs. The RadPro FPGA was developed"

ASIC is Australia’s corporate, markets and financial services regulator that enforces rules for companies, financial advisers and market operators; think of it as the referee and rulebook keeper for financial activity. It matters to investors because ASIC’s oversight, investigations and enforcement actions affect company credibility, legal risk and market fairness—actions that can change stock prices, investor confidence and the safety of financial products.

soc technical

"extensible to eFPGA Hard IP for radiation hardened ASIC and SoC designs."

Standard of care (often abbreviated SOC) is the treatment or management approach that is widely accepted and used by medical professionals for a particular disease or condition. For investors, SOC provides the benchmark against which new therapies, devices, or clinical results are judged—like comparing a new car to the current most popular model; a product that meaningfully outperforms the SOC can win market share and drive revenue, while failure to beat or match it limits commercial potential.

rtl-to-bitstream technical

"Aurora FPGA User Tools for RTL-to-Bitstream development flow with integrated logic"

RTL-to-bitstream is the engineering step that turns a hardware design described in software-like code (RTL) into the binary file that programs a physical chip such as an FPGA. For investors, it matters because successful RTL-to-bitstream flow is a key milestone in bringing a digital hardware product from prototype to production—comparable to turning a blueprint into a finished, ready-to-run machine—and influences time-to-market, product reliability, and development costs.

logic synthesis technical

"development flow with integrated logic synthesis from Synopsys Synplify"

Logic synthesis is the automated process of turning a designer’s high-level description of how a digital chip should behave into a detailed blueprint of the electronic circuits that will implement it. For investors, it matters because the quality of that translation affects product speed, power use, manufacturing cost and time to market—much like how a well-written recipe turned into clear shopping lists and step-by-step instructions helps a kitchen deliver consistent meals faster and cheaper.

development kit technical

"announced today it will demonstrate its newly released RadPro FPGA development kit"

A development kit is a bundle of tools, sample code, hardware pieces or instructions that lets engineers and partners build products or services using a company’s technology. Think of it as a ready-made toolbox or recipe kit that speeds up testing and creation. For investors, widespread availability or uptake of a development kit can signal easier adoption, faster time to market, lower costs for partners and potentially larger future revenue from a growing ecosystem.

AI-generated analysis. How Rhea-AI works. Not financial advice.

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• The RadPro Dev Kit enables Defense Industrial Base (DIB) evaluation of QuickLogic's U.S. fabricated Radiation Hardened RadPro FPGA
• Demonstration will include the Aurora FPGA User Tools for RTL-to-Bitstream development flow with integrated logic synthesis from Synopsys Synplify^® and yosys
• With this release, the first RadPro FPGA is now silicon-proven, marking a key milestone as the company advances its radiation-hardened FPGA initiative

SAN JOSE, Calif., April 9, 2026 /PRNewswire/ -- QuickLogic Corporation (NASDAQ: QUIK), a developer of embedded FPGA (eFPGA) Hard IP, Radiation Hardened, Antifuse and ruggedized FPGAs, announced today it will demonstrate its newly released RadPro FPGA development kit in Booth 15 at the 41st Hardened Electronics and Radiation Technology (HEART) Conference April 13–17, 2026 in Shreveport, Louisiana. 

The development kit includes QuickLogic's first RadPro FPGA that is fabricated in the U.S. on GlobalFoundries industry proven 12nm process technology, which is commonly used by the DIB for radiation hardened ASICs. The RadPro FPGA was developed to meet the operational requirements of various active programs in development with the DIB. The core RadPro FPGA technology is extensible to eFPGA Hard IP for radiation hardened ASIC and SoC designs.

"The release of our first RadPro FPGA and supporting development kit demonstrates the continued execution against our radiation-hardened FPGA roadmap," said Brian Faith, CEO of QuickLogic. "We accepted initial orders for our RadPro Dev Kit during Q1 that we anticipate fulfilling following the HEART Conference. With the RadPro FPGA now operational in hardware and supported with our Aurora industry standard FPGA User Tools, we are enabling DIB evaluations that can transition into long-term defense and aerospace programs of record."

RadPro FPGA Availability:
QuickLogic is accepting orders now for its RadPro FPGA Dev Kits. Shipments will be scheduled following the HEART Conference.

About QuickLogic:
QuickLogic Corporation is a fabless semiconductor company specializing in eFPGA Hard IP, discrete FPGAs, and endpoint AI solutions. QuickLogic's unique approach combines cutting-edge technology with open-source tools to deliver highly customizable, low-power solutions for industrial, aerospace, consumer, and computing markets. For more information, visit www.quicklogic.com. 

QuickLogic and logo are registered trademarks of QuickLogic. All other trademarks are the property of their respective holders and should be treated as such.

View original content to download multimedia:https://www.prnewswire.com/news-releases/quicklogic-will-demonstrate-its-radpro-fpga-dev-kit-at-heart-conference-302737571.html

SOURCE QuickLogic Corporation

FAQ

What is QuickLogic announcing about the RadPro FPGA Dev Kit (QUIK) for April 2026?

QuickLogic is demonstrating its RadPro FPGA Dev Kit at the HEART Conference April 13–17, 2026. According to the company, the kit contains its first U.S.-fabricated RadPro FPGA on GlobalFoundries 12nm plus Aurora FPGA User Tools for RTL-to-bitstream development.

When will QuickLogic (QUIK) begin shipping RadPro FPGA Dev Kits ordered now?

QuickLogic is accepting orders now and will schedule shipments after the HEART Conference. According to the company, initial orders were accepted in Q1 and fulfillment is planned following the April 13–17, 2026 conference.

What technical toolchain does the RadPro Dev Kit (QUIK) include for developers?

The RadPro Dev Kit includes the Aurora FPGA User Tools with RTL-to-bitstream flow and integrated logic synthesis. According to the company, the flow integrates Synopsys Synplify and yosys for synthesis and bitstream generation.

Why is U.S. fabrication important for QuickLogic's RadPro FPGA (QUIK)?

U.S. fabrication aligns the RadPro FPGA with Defense Industrial Base procurement practices and supply requirements. According to the company, the RadPro is fabricated on GlobalFoundries 12nm, a process commonly used for radiation-hardened defense ASICs.

What does QuickLogic (QUIK) mean by the RadPro FPGA being "silicon-proven"?

Silicon-proven means the RadPro FPGA is operational in hardware and validated in silicon. According to the company, this milestone enables DIB evaluations using the Dev Kit and the Aurora toolchain for potential transition to defense programs of record.