Welcome to our dedicated page for Synopsys news (Ticker: SNPS), a resource for investors and traders seeking the latest updates and insights on Synopsys stock.
The Synopsys, Inc. (SNPS) news feed on Stock Titan aggregates company-specific announcements, partner releases, and regulatory updates that illustrate how the business is evolving as a provider of engineering solutions from silicon to systems. Synopsys’ own press releases emphasize AI-powered design, electronic design automation, design IP, and simulation and analysis technologies, while also covering strategic partnerships, portfolio changes, and financial performance.
Investors and industry followers can use this page to review news about Synopsys’ collaborations and product directions. Recent items include a definitive agreement to sell the company’s Processor IP Solutions business to GlobalFoundries, with Synopsys stating that it will sharpen its focus on interface and foundation IP and AI-driven opportunities. Other releases describe Synopsys’ role in automotive engineering, where it highlights AI-driven and software-defined solutions that support virtualized development, electronics digital twins, and system-level simulation for automakers and suppliers.
The feed also captures announcements about partnerships that extend Synopsys’ simulation and digital twin capabilities, such as integrations with digital twin platforms and frameworks that use GPU-accelerated physics solvers and cloud infrastructure. In addition, users will find information about strategic collaborations with companies like NVIDIA, where Synopsys and its partners describe plans to combine accelerated computing, AI technologies, and Synopsys engineering solutions to address compute-intensive design and simulation workloads.
Beyond technology and portfolio news, this page may include items related to earnings releases, restructuring plans, governance changes, export control developments, and legal matters referenced in public communications. By reviewing the SNPS news stream, readers can track how Synopsys communicates its strategy, responds to regulatory developments, and reports on financial and operational milestones over time.
Synopsys, Inc. (Nasdaq: SNPS) will report its fourth quarter and fiscal year 2020 results on December 2, 2020, after market close. The conference call will begin at 2:00 p.m. PT (5:00 p.m. ET) and will be led by Aart de Geus and Trac Pham. Financial details will be available on the corporate website prior to the call, with a live webcast starting soon thereafter. The company is recognized as a leader in electronic design automation and semiconductor IP, providing essential solutions for high-quality and secure electronic products.
Synopsys, Inc. (Nasdaq: SNPS) launched the first Verification IP for Compute Express Link (CXL) 2.0, enhancing performance for data-intensive system-on-chips (SoCs). This new technology supports high-speed communication between CPUs and accelerators, built on the PCI Express infrastructure. Offering next-generation SystemVerilog architecture, the VIP accelerates integration and simulation performance. CXL 2.0 introduces advanced features like switching, security, and manageability enhancements. Both the Verification IP and DesignWare CXL IP solutions are available now.
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Synopsys (Nasdaq: SNPS) has partnered with Samsung to enhance the Fusion Design Platform, enabling a certified digital implementation and signoff reference flow for high-performance compute (HPC) designs. This collaboration aims to improve productivity and deliver high-quality results using Samsung's advanced process nodes. The reference flow includes innovative solutions that optimize performance, power, and area (PPA) metrics. Notably, Synopsys will present these capabilities at the Samsung Advanced Foundry Ecosystem (SAFE) Forum on October 28, 2020.
Synopsys has launched a new 3nm gate-all-around (GAA) AMS Design Reference Flow, developed in collaboration with Samsung. This flow aims to enhance productivity for design of analog and mixed-signal circuits, specifically for applications in 5G, HPC, AI, and IoT. Key features include in-design electromigration analysis and live design rule checking, which streamline design cycles. The flow is validated by Samsung, ensuring a comprehensive methodology for designers at advanced technology nodes. This innovation positions Synopsys as a leader in electronic design automation.
On October 27, 2020, Synopsys announced the launch of the Virtualizer Development Kit (VDK) for Infineon's AURIX TC4xx 32-bit Microcontroller. This collaboration aims to enhance automotive system development, enabling software and hardware verification before silicon availability. The internal deployment of the VDK at Infineon accelerates concept studies and improves quality through validated virtual prototypes. The VDK allows for early algorithm testing for AI and control loops, supporting eMobility initiatives. The solution is now available, with demonstrations planned for upcoming events.
Synopsys (Nasdaq: SNPS) has announced a partnership with Samsung Foundry to develop over 30 new interoperable process design kits (iPDKs) for their Custom Design Platform, covering both advanced and legacy process technologies. This collaboration enhances design and verification efficiency, achieving up to 5X faster layout and 2X faster design closure. The iPDKs facilitate advanced features, enabling better design innovation and reuse. This initiative aims to address the increasing complexities faced by the IP and analog design community, paving the way for technological advancements in high-growth markets.
Synopsys, Inc. (Nasdaq: SNPS) announced its 3DIC Compiler has enabled Samsung Foundry to efficiently design a complex 5-nanometer SoC featuring eight high-bandwidth memories (HBMs). This collaboration streamlined Samsung's multi-die integration (MDI) process, reducing design turnaround time from months to hours, essential for high-performance computing (HPC) applications. The 3DIC Compiler provides advanced design automation features, ensuring robust system performance and faster time to market. Synopsys experts will present at the upcoming Samsung Advanced Foundry Ecosystem Forum on October 28.
Synopsys (NASDAQ: SNPS) announced a significant collaboration with IBM's AI Hardware Center to advance chip architecture and design methodologies essential for the next generation of AI chips. This partnership aims to double AI compute performance annually over the next decade, focusing on innovative AI-specific hardware solutions. With multiple tapeouts achieved, the project targets a 1,000x performance increase by 2029. Synopsys contributes expertise in multi-die integration, silicon engineering, and silicon IP, enhancing AI chip design and verification.
Synopsys has been awarded the TSMC OIP Partner of the Year for the 10th consecutive year, recognizing its excellence in interface IP and electronic design automation (EDA) solutions. The awards highlight collaborations on 3nm design infrastructure, 3DIC design productivity, and scalable cloud-based timing sign-off solutions. This partnership has led to significant advancements in semiconductor design, including certification of innovative features and enhanced packaging design productivity, ultimately benefiting customers in high-performance computing, artificial intelligence, and mobile applications.