Welcome to our dedicated page for Cadence Design Systems news (Ticker: CDNS), a resource for investors and traders seeking the latest updates and insights on Cadence Design Systems stock.
Cadence Design Systems develops electronic design automation software, design IP, and system design and analysis products for semiconductor and system engineering. Company updates commonly cover AI-driven chip design, certified design flows for advanced process nodes, digital twins, physics-based simulation, and computational software used from silicon design to electromechanical systems.
Recurring developments include collaborations with semiconductor, cloud and accelerated-computing partners; customer adoption of technologies such as Tensilica Vision DSP IP and Cadence ChipStack AI Super Agent; and financial results across EDA, IP, and system design and analysis. Cadence also reports on expanded simulation capabilities, including structural and multibody dynamics technologies added through the completed Hexagon design and engineering acquisition.
Cadence Design Systems (CDNS) has announced the certification of an 8nm RFIC design reference flow by Samsung Foundry, aimed at developing 5G RFICs for sub-6GHz to mmWave applications. This advanced design flow enhances productivity, electrical analysis, and design closure, enabling high-quality RFIC designs on the first pass. Key features of the flow include support for circuit simulation, electromagnetic-aware design, and post-layout extraction. This collaboration advances the design capabilities for customers in the growing 5G market, including smartphones and communications infrastructure.
Cadence Design Systems (NASDAQ: CDNS) has optimized its Voltus-XFi Custom Power Integrity solution for Samsung Foundry’s advanced 5LPE process technology. This certification enhances collaboration between the two companies, allowing customers to integrate advanced design software for creating integrated circuits (ICs) aimed at hyperscale computing, mobile, automotive, and AI applications. The Voltus-XFi solution offers a comprehensive workflow, ensuring high performance and low power consumption in line with emerging technology demands.
Cadence Design Systems has launched the Cadence Verisium Artificial Intelligence (AI)-Driven Verification Platform. This new suite uses big data and AI to enhance verification workloads, coverage, and the analysis of design bugs on complex System-on-Chips (SoCs). Built on the Cadence Joint Enterprise Data and AI (JedAI) Platform, Verisium optimizes multiple runs across SoC designs, improving productivity through advanced machine learning models. Initial apps include Verisium AutoTriage, SemanticDiff, and others, each focused on automating and streamlining the verification process.
Cadence Design Systems has launched the Cadence JedAI Platform, a significant advancement in electronic design automation (EDA) that integrates big data and AI to enhance productivity and optimize the design process. This platform unifies analytics across various Cadence applications, enabling engineers to manage both structured and unstructured data efficiently. It aims to facilitate quicker insights and improve key metrics such as power, performance, and area (PPA) across multiple designs. The platform supports cloud capabilities and is designed to meet the growing complexities in chip design across diverse industries.
Cadence Design Systems (NASDAQ: CDNS) has acquired OpenEye Scientific Software for approximately $500 million. This strategic move enhances Cadence's Intelligent System Design strategy, expanding its capabilities into molecular modeling and simulation for life sciences. OpenEye’s technologies are crucial for drug discovery, utilized by top global pharmaceutical companies. The acquisition is expected to contribute $40 million in revenue for fiscal year 2023, although it will yield immaterial revenue this year.
United Microelectronics Corporation (UMC) and Cadence Design Systems (CDNS) announced the certification of Cadence's analog/mixed-signal IC design flow for UMC's 22ULP/ULL process technologies. This collaboration enhances process efficiency and shortens design cycles for applications in 5G, IoT, and displays. UMC's 22nm technology focuses on ultra-low power and leakage, providing customers with a balance of cost and performance. The certified flow includes tools like the Virtuoso design platform and Spectre AMS Designer, aimed at boosting design efficiency.
Cadence Design Systems (CDNS) has partnered with GlobalFoundries (GF) to enhance 5G mobile design through the introduction of Cadence's RF and mmWave flow for GF's 22FDX platform. This collaboration successfully designed a 28GHz 5G mmWave IC, which integrates an antenna in a system-in-package format. The design, tested by Fraunhofer IIS/EAS, exhibited strong correlation with silicon measurements. The comprehensive design flow aims to optimize performance, power efficiency, and reliability for clients.
Cadence Design Systems announces the launch of the first Verification IP (VIP) and System-Level VIP for the CXL 3.0 standard, enhancing testing and compliance in data center applications. The solution integrates with PCIe 6.0, using Cadence TripleCheck technology for effective verification. Additionally, the System VIP includes a Traffic Library for CXL and tools for performance analysis, addressing the latest CXL requirements. This release supports Cadence's broader verification flow and Intelligent System Design strategy, aiding early adopters in achieving efficient verification closure.
Cadence Design Systems (NASDAQ: CDNS) announced that Arm is utilizing its Liberate MX Trio Characterization to enhance the quality of embedded memory and speed up market delivery. This solution enabled Arm to reduce memory LVF characterization validation runtime by 7X compared to traditional Monte Carlo simulations. The automated and less error-prone process improved accuracy while minimizing manual efforts and validation time. The adoption of this characterization tool signifies Arm's commitment to meeting evolving memory characterization demands.
Cadence Design Systems will participate in the KeyBanc Technology Leadership Forum on August 9, 2022. CEO Anirudh Devgan will lead a virtual fireside chat at 7:45 a.m. MDT. The event will be webcast live, with a replay available from 7:00 a.m. PDT on August 10, 2022 until 5:00 p.m. PDT on September 16, 2022. Interested parties can access the webcast at cadence.com/cadence/investor_relations.