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Cadence Design Systems develops electronic design automation software, design IP, and system design and analysis products for semiconductor and system engineering. Company updates commonly cover AI-driven chip design, certified design flows for advanced process nodes, digital twins, physics-based simulation, and computational software used from silicon design to electromechanical systems.
Recurring developments include collaborations with semiconductor, cloud and accelerated-computing partners; customer adoption of technologies such as Tensilica Vision DSP IP and Cadence ChipStack AI Super Agent; and financial results across EDA, IP, and system design and analysis. Cadence also reports on expanded simulation capabilities, including structural and multibody dynamics technologies added through the completed Hexagon design and engineering acquisition.
Cadence Design Systems (CDNS) has expanded its collaboration with Samsung Foundry to enhance 3D-IC design capabilities. The Cadence Integrity 3D-IC platform now supports die-on-die stacking, optimizing power, performance, and area (PPA) for complex applications. This collaboration allows users to optimize through TSV placement in stacked die designs, mitigating traditional design challenges. It streamlines the design process by enabling planning, implementation, and signoff from a single interface, aimed at improving overall productivity.
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Cadence Design Systems (CDNS) has partnered with Google Cloud to enhance semiconductor design through the Cadence Cloud Passport, offering certified cloud-ready tools. This collaboration has resulted in up to 10X improvements in design throughput and 25% performance gains on Google Cloud C2D instances versus on-premises solutions. Customers benefit from improved scalability, high-performance computing access, and reduced time-to-solution. Notably, Google silicon teams have successfully utilized Cadence tools to develop Tensor SoCs and TPUs, significantly boosting design reliability and project timelines.
Cadence Design Systems introduces the Cadence Certus Closure Solution, designed to automate the chip design closure process, reducing turnaround time from weeks to overnight. This solution features a massively parallel architecture, significantly boosting productivity by up to 10X compared to existing methodologies. The Certus Closure Solution supports essential design aspects such as 5G communications and hyperscale computing, while offering cloud readiness for extensive chip design projects. It enhances engineering productivity and integrates with existing tools for streamlined operations.
Cadence Design Systems (CDNS) will host its third quarter 2022 financial results webcast on October 24, 2022, at 2:00 p.m. Pacific Time. CEO Dr. Anirudh Devgan and CFO John Wall will participate in the event. An archived version of the webcast will be accessible from 5:00 p.m. Pacific Time on the same day until December 16, 2022. Cadence is recognized as a leader in electronic systems design, known for its Intelligent System Design strategy and has been named one of the 100 Best Companies to Work For by Fortune for eight consecutive years.
Cadence Design Systems (CDNS) has announced the certification of an 8nm RFIC design reference flow by Samsung Foundry, aimed at developing 5G RFICs for sub-6GHz to mmWave applications. This advanced design flow enhances productivity, electrical analysis, and design closure, enabling high-quality RFIC designs on the first pass. Key features of the flow include support for circuit simulation, electromagnetic-aware design, and post-layout extraction. This collaboration advances the design capabilities for customers in the growing 5G market, including smartphones and communications infrastructure.
Cadence Design Systems (NASDAQ: CDNS) has optimized its Voltus-XFi Custom Power Integrity solution for Samsung Foundry’s advanced 5LPE process technology. This certification enhances collaboration between the two companies, allowing customers to integrate advanced design software for creating integrated circuits (ICs) aimed at hyperscale computing, mobile, automotive, and AI applications. The Voltus-XFi solution offers a comprehensive workflow, ensuring high performance and low power consumption in line with emerging technology demands.
Cadence Design Systems has launched the Cadence Verisium Artificial Intelligence (AI)-Driven Verification Platform. This new suite uses big data and AI to enhance verification workloads, coverage, and the analysis of design bugs on complex System-on-Chips (SoCs). Built on the Cadence Joint Enterprise Data and AI (JedAI) Platform, Verisium optimizes multiple runs across SoC designs, improving productivity through advanced machine learning models. Initial apps include Verisium AutoTriage, SemanticDiff, and others, each focused on automating and streamlining the verification process.
Cadence Design Systems has launched the Cadence JedAI Platform, a significant advancement in electronic design automation (EDA) that integrates big data and AI to enhance productivity and optimize the design process. This platform unifies analytics across various Cadence applications, enabling engineers to manage both structured and unstructured data efficiently. It aims to facilitate quicker insights and improve key metrics such as power, performance, and area (PPA) across multiple designs. The platform supports cloud capabilities and is designed to meet the growing complexities in chip design across diverse industries.
Cadence Design Systems (NASDAQ: CDNS) has acquired OpenEye Scientific Software for approximately $500 million. This strategic move enhances Cadence's Intelligent System Design strategy, expanding its capabilities into molecular modeling and simulation for life sciences. OpenEye’s technologies are crucial for drug discovery, utilized by top global pharmaceutical companies. The acquisition is expected to contribute $40 million in revenue for fiscal year 2023, although it will yield immaterial revenue this year.