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QuickLogic to Present and Exhibit at Andes RISC-V CON Technology Summit in San Jose

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QuickLogic (NASDAQ: QUIK), a developer of embedded FPGA technology and solutions, is set to present at the Andes RISC-V CON Technology Summit in San Jose on April 29th, 2025. Andy Jaros, VP of IP Sales, will deliver a presentation titled 'RISC-V + eFPGA: A Flexible Solution for Any Application' at 12:10 p.m. PT at the DoubleTree by Hilton San Jose.

The presentation will explore how embedded FPGA (eFPGA) technology can enhance embedded RISC-V processing solutions from Andes Technology, focusing on:

  • Acceleration capabilities
  • Co-processing functions
  • Peripheral integration

Jaros will also showcase QuickLogic's Australis™ eFPGA IP Generator, demonstrating the company's ability to rapidly create custom eFPGA Hard IP cores across various process technologies and nodes. QuickLogic will maintain an exhibition presence at the event for additional engagement with attendees.

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SAN JOSE, Calif., April 23, 2025 /PRNewswire/ -- QuickLogic Corporation (NASDAQ: QUIK), a developer of embedded FPGA (eFPGA) Hard IP, ruggedized FPGAs, and FPGA User Tools, will present and exhibit at the Andes RISC-V CON Technology Summit in San Jose on April 29th. The presentation, delivered by QuickLogic's Vice President of IP Sales, Andy Jaros, will focus on using embedded FPGA (eFPGA) technology to customize embedded RISC-V processing solutions from Andes Technology.

Title:

RISC-V + eFPGA: A Flexible Solution for Any Application

Date:

April 29, 2025

Time:

12:10 p.m. PT

Venue:

DoubleTree by Hilton San Jose

Mr. Jaros will discuss multiple use cases for augmenting processor-based designs with complementary eFPGA capabilities, including acceleration, co-processing, and peripheral integration. For each case, he will explain the inherent flexibility benefits in eFPGA technology and how these attributes can significantly add value to ASIC-based embedded processor designs.

He will also discuss QuickLogic's Australis™ eFPGA IP Generator, highlighting how QuickLogic rapidly creates custom eFPGA Hard IP cores tailored to each customer's unique requirements, across a wide range of process technologies and nodes.

In addition to the presentation, QuickLogic will be exhibiting at the event to engage with attendees and share more about its eFPGA solutions. For more information, please visit the event website.

About QuickLogic 
QuickLogic Corporation is a fabless semiconductor company that specializes in eFPGA Hard IP, discrete FPGAs, and endpoint AI solutions. The company's unique technology, combined with open-source development tools, enables highly customizable and low-power silicon solutions for aerospace and defense, industrial, consumer, and edge computing markets. For more information, visit www.quicklogic.com.

About Andes Technology
As a Founding Premier member of RISC-V International and a leader in commercial CPU IP, Andes Technology (TWSE: 6533SIN: US03420C2089ISIN: US03420C1099) is driving the global adoption of RISC-V. Andes' extensive RISC-V Processor IP portfolio spans from ultra-efficient 32-bit CPUs to high-performance 64-bit Out-of-Order multiprocessor coherent clusters. With advanced vector processing, DSP capabilities, the powerful Andes Automated Custom Extension (ACE) framework, end-to-end AI hardware/software stack, ISO 26262 certification with full compliance, and a robust software ecosystem, Andes unlocks the full potential of RISC-V, empowering customers to accelerate innovation across AI, automotive, communications, consumer electronics, data centers, and mobile devices. Over 16 billion Andes-powered SoCs are driving innovations globally. Discover more at www.andestech.com and connect with Andes on LinkedInX (formerly Twitter)Bilibili and YouTube.

QuickLogic and logo are registered trademarks of QuickLogic. All other trademarks are the property of their respective holders and should be treated as such.  

 

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SOURCE QuickLogic Corporation

FAQ

What will QuickLogic present at the Andes RISC-V CON Technology Summit 2025?

QuickLogic will present on using eFPGA technology to customize RISC-V processing solutions, focusing on acceleration, co-processing, and peripheral integration capabilities.

When and where is QuickLogic's RISC-V presentation scheduled for 2025?

The presentation is scheduled for April 29th, 2025, at 12:10 p.m. PT at the DoubleTree by Hilton San Jose.

What is QuickLogic's Australis eFPGA IP Generator?

Australis is QuickLogic's eFPGA IP Generator that creates custom eFPGA Hard IP cores tailored to customer requirements across various process technologies and nodes.

How does QuickLogic's eFPGA technology enhance RISC-V processing solutions?

QuickLogic's eFPGA technology enhances RISC-V solutions through acceleration, co-processing capabilities, and peripheral integration, adding flexibility to ASIC-based embedded processor designs.

What are the key applications of QuickLogic's eFPGA technology for RISC-V processors?

The key applications include acceleration, co-processing functions, and peripheral integration for ASIC-based embedded processor designs.
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