SEMIFIVE Collaborates with Synopsys to Develop Advanced Chiplet Platform for High-Performance Multi-Die Designs

Rhea-AI Summary

SEMIFIVE announced a collaboration with Synopsys to develop a high-performance computing (HPC) platform that integrates SEMIFIVE's CPU chiplet with third-party I/O chiplet technology. The platform, built on 4nm process technology, will incorporate Synopsys' UCIe controller and PHY IP solutions. This initiative aims to reduce costs, optimize performance, and provide development flexibility compared to traditional chiplet platforms. The collaboration leverages SEMIFIVE's pre-designed and validated SoC platforms on advanced process nodes to improve development efficiency for HPC customers.

Positive

• Development of advanced HPC platform on 4nm process technology
• Integration of silicon-proven UCIe IP already adopted by multiple hyperscalers
• Pre-designed and validated SoC platforms to improve development efficiency

Negative

• None.

The Platform Helps Meet PPA Goals and Accelerate Time-to-Market

SEOUL, South Korea, Nov. 11, 2024 /PRNewswire/ -- SEMIFIVE, a leading design solution provider and pioneer of platform-based custom silicon solutions, today announced their collaboration with Synopsys to develop a cutting-edge high-performance computing (HPC) platform integrating SEMIFIVE's CPU chiplet with a third-party I/O chiplet into a unified package. SEMIFIVE's HPC chiplet platform will offer notable advantages over traditional chiplet platforms to reduce cost, optimize performance, and enable development flexibility. This platform will advance semiconductor technology, leading to the creation of versatile and customized chiplets to meet the diverse needs of HPC customers.

SEMIFIVE's CPU chiplet, manufactured on 4nm process technology, will include Synopsys UCIe controller and PHY IP as well as other IP solutions. Synopsys' IP solutions have helped SEMIFIVE achieve multiple generations of silicon success and become a global leader in innovative custom silicon solutions. SEMIFIVE's portfolio of optimized SoC platforms are pre-designed and validated on advanced process nodes, allowing customers to improve their overall development efficiency.

"Synopsys and SEMIFIVE are helping companies adopt multi-die designs to address the growing compute demands of high-performance systems," said Michael Posner, vice president of IP product management at Synopsys. "The combination of Synopsys' silicon-proven UCIe IP, which has been adopted by multiple hyperscalers, and SEMIFIVE's extensive SoC platform, helps companies reliably meet their multi-die design requirements and accelerate their development effort."

"We are confident that chiplets represent the future of silicon design. Our collaboration with Synopsys, particularly using their UCIe IP, is a key factor in ushering in the chiplet era," said Brandon Cho, CEO and co-founder of SEMIFIVE. "By delivering platforms like the HPC chiplet platform, we will enable our customers to bring innovative, customized solutions to market faster than ever before."

About SEMIFIVE

SEMIFIVE is the pioneer of platform based SoC design, working with customers to implement innovative ideas into custom silicon in the most efficient way. Our SoC platforms offer a powerful springboard for new chip designs and leverage configurable domain-specific architectures and pre-validated key IP pools. We offer comprehensive spec-to-system capabilities with end-to-end solutions so that custom SoCs can be realized faster, with reduced cost and risks for key applications such as data center or AI-enabled IoT. With a strong partnership with Samsung Foundry as a leading SAFE^TM DSP partner, as well as the larger ecosystem, SEMIFIVE provides a one-stop shop solution for any SoC design needs. For more information, please visit www.semifive.com.

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SOURCE SEMIFIVE

FAQ

What is SEMIFIVE's new chiplet platform collaboration with Synopsys?

SEMIFIVE is collaborating with Synopsys to develop an HPC platform that integrates SEMIFIVE's CPU chiplet with third-party I/O chiplet technology, using Synopsys' UCIe controller and PHY IP on 4nm process technology.

What are the key benefits of SEMIFIVE's new HPC chiplet platform?

The platform offers reduced costs, optimized performance, and development flexibility compared to traditional chiplet platforms, while improving overall development efficiency through pre-designed and validated SoC platforms.

What technology is being used in SEMIFIVE's new chiplet platform?

The platform uses 4nm process technology and incorporates Synopsys' UCIe controller and PHY IP solutions, along with other IP solutions in SEMIFIVE's CPU chiplet design.