Welcome to our dedicated page for Quicklogic news (Ticker: QUIK), a resource for investors and traders seeking the latest updates and insights on Quicklogic stock.
QuickLogic Corporation (NASDAQ: QUIK) regularly issues news and updates that reflect its role as a fabless semiconductor company focused on embedded FPGA (eFPGA) Hard IP, ruggedized and Strategic Radiation Hardened FPGAs, Antifuse devices, and endpoint AI solutions. The QUIK news stream highlights how its technologies are being adopted in aerospace and defense, industrial, computing, consumer, data center, and space-related applications.
On this page, readers can follow QuickLogic announcements about design wins and IP selections, such as its eFPGA Hard IP being chosen for high-performance data center ASICs, crypto-agile security devices, and radiation-tolerant RISC-V microcontrollers. News items also cover progress on the company’s Strategic Radiation Hardened FPGA program, including U.S. government contract milestones, test chip tape-outs on GlobalFoundries process technologies, and orders for Strategic Radiation Hardened FPGA Development Kits.
Investors and industry observers will also find financial results press releases and related conference call information, where QuickLogic reports quarterly performance and discusses its use of GAAP and non-GAAP financial measures. Additional updates include participation in trade shows and conferences such as Space Tech Expo Europe and Embedded World North America, where the company showcases its Australis IP Generator, open-source Aurora tools, and eFPGA chiplet technology.
For anyone tracking QUIK stock or monitoring developments in eFPGA IP, radiation-hardened FPGAs, and endpoint AI, this news feed provides a centralized view of QuickLogic’s public announcements over time.
QuickLogic (NASDAQ: QUIK) will exhibit and present at GOMACTech 2026, March 9–12, 2026, in New Orleans. The company will staff an exhibit and deliver a technical poster titled "Enabling Flexible Heterogeneous Integration with an eFPGA Chiplet on Intel® 18A".
The poster is presented by Trey Peterson, Field Applications Engineer, on March 12, 2026, 10:30 AM–12:00 PM. Exhibit hours are March 10–11 at the New Orleans Ernest N. Morial Convention Center.
QuickLogic (NASDAQ: QUIK) reported fiscal Q4 2025 results and program milestones on March 3, 2026. Q4 revenue was $3.7M, down 34.2% year-over-year but up 84.0% sequentially. The company secured an expanded U.S. SRH FPGA prime contract ceiling near $89M and received a $13M contract tranche.
Q4 GAAP gross margin was 18.1%, GAAP net loss was $6.0M (loss $0.35/share), and non-GAAP net loss was $2.9M (loss $0.17/share). Management highlighted product, government, and design-win progress aimed at 2026 revenue growth.
QuickLogic (NASDAQ: QUIK) announced a $13 million contract award on February 18, 2026 to support continued development and demonstration of its Strategic Radiation Hardened (SRH) high‑reliability FPGA technology.
This award is the latest tranche of a multi‑year program that began in August 2022 and aims to meet Department of War (DoW) strategic and space system requirements, with QuickLogic continuing as Prime Contractor.
QuickLogic (NASDAQ: QUIK) will exhibit and present at Chiplet Summit 2026 in Santa Clara, Feb 17–19. The company will staff Booth #416 to demo eFPGA IP and eFPGA-based chiplets and will deliver a technical session on Feb 19 titled "Enabling Flexible Heterogeneous Integration with an eFPGA Chiplet on Intel® 18A".
The presentation by Trey Peterson, Applications Engineer, is scheduled for Session E-202 on Feb 19 from 3:00 p.m. to 4:20 p.m.
QuickLogic (NASDAQ: QUIK) scheduled its fiscal 2025 fourth quarter and full year results call for Tuesday, March 3, 2026 at 5:30 p.m. ET / 2:30 p.m. PT. Dial-in and replay details were provided and a webcast will be posted on the company's investor relations events page and archived for 12 months.
QuickLogic (NASDAQ: QUIK) announced it has received orders for its Strategic Radiation Hardened FPGA Development Kit (SRH FPGA Dev Kit). The kits include SRH FPGA test chips that QuickLogic funded and had fabricated on GlobalFoundries' 12 nm process. Delivery of the SRH FPGA Dev Kit is scheduled for late Q1 2026. The company said the test chip was designed to meet requirements of certain large Defense Industrial Base customers with programs in development and that the kits support both discrete SRH FPGA and embedded SRH FPGA-in-ASIC design evaluations.
QuickLogic (NASDAQ: QUIK) announced an expanded scope for its Prime U.S. government Strategic Radiation Hardened (SRH) FPGA contract, increasing the total ceiling to approximately $88 million over multiple years.
The contract work is sponsored under DoD's Trusted and Assured Microelectronics (T&AM) Program with Naval Surface Warfare Center Crane as technical lead. QuickLogic said it has completed the design and taped out a test FPGA chip to be fabricated by GlobalFoundries on its 12LP process.
QuickLogic (NASDAQ: QUIK) announced its eFPGA Hard IP was selected by the University of Saskatchewan STARR-Lab to personalize the next-generation StarRISC rad-tolerant RISC-V microcontroller. The design will be taped out on Globalfoundries 12nm FinFET and is partially supported by GF's University Research Program.
Integration of eFPGA enables on-chip prototyping of custom logic blocks, accelerators, and mission-specific algorithms for space and high-reliability environments. QuickLogic highlighted delivery timelines of 4–6 months to provide fab-specific Hard IP and customer variants in weeks, supported by its Australis IP Generator and two toolchains: Aurora (open-source) and Aurora Pro (Synopsys Synplify integration).
QuickLogic (NASDAQ: QUIK) announced that Idaho Scientific selected QuickLogic's eFPGA Hard IP to enable crypto‑agile, hardware‑based cryptographic solutions and root of trust capabilities for mobile, IoT, infrastructure, and defense systems.
The eFPGA IP is presented as a way to iterate cryptographic techniques without multiple tapeouts, reducing design risk and cost and accelerating development. QuickLogic says it can deliver fab‑specific Hard IP on a new process node in 4–6 months, with customer variants available in weeks via its Australis IP Generator. The IP is supported by two tool suites: Aurora (open source) and Aurora Pro (integrates Synopsys Synplify).
QuickLogic (NASDAQ: QUIK) announced its eFPGA Hard IP was selected by Chipus for a high-performance data center production ASIC to be fabricated on a 12 nm process.
The selection highlights eFPGA as a central design requirement and emphasizes QuickLogic's silicon-proven IP, its ability to reduce ASIC risk and shorten schedules, and delivery timelines of 4–6 months for fab-specific Hard IP and customer variants in weeks via the Australis IP Generator. Tool support includes open-source Aurora and Aurora Pro with Synopsys Synplify integration.