University of Saskatchewan Selects QuickLogic eFPGA HardIP for StarRISC MCU

Rhea-AI Summary

QuickLogic (NASDAQ: QUIK) announced its eFPGA Hard IP was selected by the University of Saskatchewan STARR-Lab to personalize the next-generation StarRISC rad-tolerant RISC-V microcontroller. The design will be taped out on Globalfoundries 12nm FinFET and is partially supported by GF's University Research Program.

Integration of eFPGA enables on-chip prototyping of custom logic blocks, accelerators, and mission-specific algorithms for space and high-reliability environments. QuickLogic highlighted delivery timelines of 4–6 months to provide fab-specific Hard IP and customer variants in weeks, supported by its Australis IP Generator and two toolchains: Aurora (open-source) and Aurora Pro (Synopsys Synplify integration).

Key Figures

Process node 12 nm GF 12nm FinFET technology node for StarRISC MCU tape-out

Prior node 22 nm FDSOI Previous StarRISC MCU node demonstrating no proton upsets

IP delivery time 4–6 months Timeframe to deliver eFPGA Hard IP on a new process node

Market Reality Check

$6.26 Last Close

Volume Volume 65,999 versus 20-day average 139,569, indicating lighter-than-normal trading ahead of this news. low

Technical Price at 6.26, trading above the 200-day moving average of 5.95 despite being well below the 52-week high.

Peers on Argus

Before this news, QUIK was down 0.48% while several peers such as GCTS (-3.4%), MX (-2.98%), and ICG (-1.62%) also traded lower, but scanner data did not flag a broad, coordinated sector move.

Historical Context

Date	Event	Sentiment	Move	Catalyst
Dec 02	Design win news	Positive	-1.8%	Idaho Scientific selected eFPGA Hard IP for crypto‑agile security solutions.
Nov 18	Design win news	Positive	-1.3%	Chipus chose eFPGA Hard IP for 12 nm high‑performance data center ASIC.
Nov 11	Earnings release	Negative	-0.8%	Q3 2025 revenue fell to <b>$2.0M</b> with widened losses and negative margins.
Nov 06	Conference promotion	Positive	-2.5%	Showcased export‑compliant, radiation‑tolerant eFPGA IP at Space Tech Expo Europe.
Oct 30	Conference promotion	Positive	-4.0%	Planned demos of Australis eFPGA IP Generator and chiplet tech at trade show.

Pattern Detected

Recent history shows QUIK often trading lower after positive partnership or marketing news, while weak earnings saw a modestly negative but directionally aligned reaction.

Recent Company History

Over the past few months, QuickLogic has repeatedly highlighted design wins and ecosystem expansion around its eFPGA Hard IP, including selections by Idaho Scientific and Chipus and promotion at major industry events like Space Tech Expo Europe and Embedded World North America. However, fiscal Q3 2025 results showed revenue of $2.0M with significant year-over-year and sequential declines. Against that backdrop, today’s University of Saskatchewan selection extends the narrative of adoption in specialized, high‑reliability applications.

Regulatory & Risk Context

Active S-3 Shelf Registration 2025-08-14

The company has an effective Form S-3 shelf registration dated 2025-08-14 with an expiration on 2028-08-14 and no recorded usage events so far, indicating the registration remains available but has not yet been drawn upon.

Market Pulse Summary

This announcement highlights another adoption of QuickLogic’s eFPGA Hard IP, this time for a radiation‑tolerant RISC‑V microcontroller targeting space and high‑reliability uses on a 12 nm node. It extends prior design wins and marketing efforts around the same IP. However, fiscal Q3 2025 revenue of $2.0M and negative gross margins underscore operational challenges. Observers may track future contracts, utilization of the existing S-3 registration, and any shift in revenue trends.

Key Terms

eFPGA technical

"QuickLogic's eFPGA Hard IP has been selected by the University of Saskatchewan's"

An eFPGA is a programmable block of computer hardware that chip makers can embed inside larger chips so customers can reconfigure certain functions after the chip is manufactured. Think of it as a small patch of hardware that can be reshaped like Lego pieces to add or change features without redesigning the whole chip. For investors, eFPGAs matter because they can increase a chip’s lifespan, add customer value, and create recurring licensing or royalty revenue streams.

AI-generated analysis. Not financial advice.

- Selection expands QuickLogic's role in radiation-tolerant open-hardware innovation for space and research applications

SAN JOSE, Calif., Dec. 9, 2025 /PRNewswire/ --  QuickLogic Corporation (NASDAQ: QUIK), a developer of embedded FPGA (eFPGA) Hard IP and ruggedized FPGAs, announced today that its eFPGA Hard IP has been selected by the University of Saskatchewan's  Semiconductor Technology and Rad-Effects Research Lab (STARR-Lab) to support personalization of its next generation StarRISC Rad-Tolerant RISC-V Microcontroller. The project is also partially supported by Globalfoundries' University Research Program and will be taped out with GF 12nm FinFET  technology node. By integrating eFPGA technology into the StarRISC platform, researchers and engineers will be able to prototype and evaluate custom logic blocks, accelerators, and mission-specific algorithms on a radiation-tolerant device designed for space and high-reliability environments.

"STARR-Lab has worked with QuickLogic as members of the Open Hardware Group for several years," said Dr. Li Chen, Professor of Electrical and Computer Engineering and supervisor for the STARR Lab.  "We're excited to add eFPGA  capability to the next StarRISC Microcontroller, giving users the flexibility to explore new functions, accelerators, and ideas limited only by their imagination."

"The impressive work that Professor Chen and his team have done in creating a rad-tolerant RISC-V MCU with 22nm FDSOI node demonstrating no proton upsets and resilience to very high LET ions, aligns closely with QuickLogic's investment and focus in supporting the space community with eFPGA IP," said Mao Wang, senior director of product marketing at QuickLogic.  "We appreciate the STARR-Lab team choosing to incorporate our eFPGA Hard IP into their next design. This will give teams a new platform to experiment with custom logic on radiation-tolerant microcontroller."

QuickLogic can deliver eFPGA Hard IP on any new process node within four to six months, including radiation tolerant implementations, supporting applications from high-performance data processing to low-power, battery-operated devices. Once a fab-specific Hard IP is established, customer-specific variants can be delivered in just weeks, enabled by QuickLogic's proprietary Australis IP Generator. QuickLogic eFPGA IP is supported by two FPGA tool suites: Aurora, a 100% open-source version, and Aurora Pro, which integrates Synopsys® Synplify® FPGA Logic Synthesis.

For more information on QuickLogic's eFPGA IP licensing and other solutions, please visit www.quicklogic.com.

About STARR-Labs
The Semiconductor Technology and Rad-Effects Research Lab (STARR-Lab) is located at the University of Saskatchewan in Canada. We are a diverse group of students, researchers, and faculty who study radiation-effects in microelectronics, device reliabilty, and more. Our research group takes ideas from conception, through to design and implemenation, ending with real-world testing. Over the years we have collected a wealth of experience in semiconductor design and testing.

About QuickLogic 
QuickLogic Corporation is a fabless semiconductor company specializing in eFPGA Hard IP, discrete FPGAs, and endpoint AI solutions. QuickLogic's unique approach combines cutting-edge technology with open-source tools to deliver highly customizable, low-power solutions for industrial, aerospace, consumer, and computing markets. For more information, visit www.quicklogic.com. 

QuickLogic and logo are registered trademarks of QuickLogic. All other trademarks are the property of their respective holders and should be treated as such.

 

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SOURCE QuickLogic Corporation

FAQ

What did QuickLogic (QUIK) announce on December 9, 2025 regarding the StarRISC MCU?

QuickLogic said its eFPGA Hard IP was selected to support personalization of the StarRISC rad-tolerant RISC-V microcontroller.

Which process node and foundry will tape out the StarRISC design using QUIK eFPGA?

The design is slated for tape-out on Globalfoundries 12nm FinFET technology.

How quickly can QuickLogic deliver fab-specific eFPGA Hard IP for new nodes?

QuickLogic stated it can deliver fab-specific eFPGA Hard IP in 4–6 months, with customer-specific variants in weeks.

What capabilities will QUIK's eFPGA add to the StarRISC microcontroller for space use?

It enables on-chip prototyping of custom logic blocks, accelerators, and mission-specific algorithms on a radiation-tolerant device.

Who is supporting the University of Saskatchewan STARR-Lab project with QUIK eFPGA?

The project is partially supported by Globalfoundries' University Research Program.

What FPGA toolchains support QuickLogic eFPGA IP for QUIK customers?

QuickLogic eFPGA IP is supported by Aurora (100% open-source) and Aurora Pro (integrates Synopsys Synplify).