University of Saskatchewan Selects QuickLogic eFPGA HardIP for StarRISC MCU

QuickLogic (NASDAQ: QUIK) announced its eFPGA Hard IP was selected by the University of Saskatchewan STARR-Lab to personalize the next-generation StarRISC rad-tolerant RISC-V microcontroller.

Rhea-AI Summary

QuickLogic (NASDAQ: QUIK) announced its eFPGA Hard IP was selected by the University of Saskatchewan STARR-Lab to personalize the next-generation StarRISC rad-tolerant RISC-V microcontroller. The design will be taped out on Globalfoundries 12nm FinFET and is partially supported by GF's University Research Program.

Integration of eFPGA enables on-chip prototyping of custom logic blocks, accelerators, and mission-specific algorithms for space and high-reliability environments. QuickLogic highlighted delivery timelines of 4–6 months to provide fab-specific Hard IP and customer variants in weeks, supported by its Australis IP Generator and two toolchains: Aurora (open-source) and Aurora Pro (Synopsys Synplify integration).

Argus Dec 9 session

+1.76% close to close Open Argus

Details

News Market Reaction – QUIK

On Dec 9, the day this news came out, QUIK closed 1.76% above the previous close.

Data tracked by StockTitan Argus for the Dec 9 session.

Key Figures

Process node: 12 nm Prior node: 22 nm FDSOI IP delivery time: 4–6 months

Process node

12 nm

GF 12nm FinFET technology node for StarRISC MCU tape-out

Prior node

22 nm FDSOI

Previous StarRISC MCU node demonstrating no proton upsets

IP delivery time

4–6 months

Timeframe to deliver eFPGA Hard IP on a new process node

Historical Context

5 past events · Latest: Dec 02

5 events

1. Dec 02

   Design win news

   24h Move

   -1.8%

   Idaho Scientific selected eFPGA Hard IP for crypto‑agile security solutions.

2. Nov 18

   Design win news

   24h Move

   -1.3%

   Chipus chose eFPGA Hard IP for 12 nm high‑performance data center ASIC.

3. Nov 11

   Earnings release

   24h Move

   -0.8%

   Q3 2025 revenue fell to $2.0M with widened losses and negative margins.

4. Nov 06

   Conference promotion

   24h Move

   -2.5%

   Showcased export‑compliant, radiation‑tolerant eFPGA IP at Space Tech Expo Europe.

5. Oct 30

   Conference promotion

   24h Move

   -4.0%

   Planned demos of Australis eFPGA IP Generator and chiplet tech at trade show.

24h Move is the share-price change in the day after each event; other market factors may also have contributed.

Key Terms

eFPGA, RISC-V, FinFET, FDSOI

4 terms

eFPGA technical

"QuickLogic's eFPGA Hard IP has been selected by the University of Saskatchewan's"

An eFPGA is a programmable block of computer hardware that chip makers can embed inside larger chips so customers can reconfigure certain functions after the chip is manufactured. Think of it as a small patch of hardware that can be reshaped like Lego pieces to add or change features without redesigning the whole chip. For investors, eFPGAs matter because they can increase a chip’s lifespan, add customer value, and create recurring licensing or royalty revenue streams.

RISC-V technical

"StarRISC Rad-Tolerant RISC-V Microcontroller. The project is also partially"

A royalty-free, open instruction set architecture (ISA) that acts like a blueprint for how a computer’s brain understands and executes commands. Because it is not owned by a single company and can be freely implemented and customized, RISC‑V can lower licensing costs, speed product development, and encourage competition and supply-chain diversification—factors investors watch because they affect margins, market share, and the pace of innovation in chips and devices.

FinFET technical

"will be taped out with GF 12nm FinFET technology node. By integrating eFPGA"

A FinFET is a modern type of transistor used inside microchips where the conducting channel is formed as a thin vertical “fin” rather than a flat surface; that three-dimensional shape gives manufacturers tighter control over electrical flow. For investors, FinFET technology matters because it lets chips become smaller, faster and more energy-efficient, which affects product performance, manufacturing costs, yields and competitive advantage across the semiconductor supply chain—similar to replacing a single gate on a road with a fenced multi-lane control that reduces leakage and improves traffic flow.

FDSOI technical

"MCU with 22nm FDSOI node demonstrating no proton upsets and resilience"

FD-SOI (Fully Depleted Silicon On Insulator) is a semiconductor technology for making computer chips that places a thin insulating layer under the active silicon so transistors use less power, switch faster, and generate less heat. For investors, FD-SOI can mean companies using it may offer more energy-efficient, higher-performance products at lower cost, which can influence competitiveness, margins and market demand much like a car maker gaining a more fuel-efficient engine.

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- Selection expands QuickLogic's role in radiation-tolerant open-hardware innovation for space and research applications

SAN JOSE, Calif., Dec. 9, 2025 /PRNewswire/ --  QuickLogic Corporation (NASDAQ: QUIK), a developer of embedded FPGA (eFPGA) Hard IP and ruggedized FPGAs, announced today that its eFPGA Hard IP has been selected by the University of Saskatchewan's  Semiconductor Technology and Rad-Effects Research Lab (STARR-Lab) to support personalization of its next generation StarRISC Rad-Tolerant RISC-V Microcontroller. The project is also partially supported by Globalfoundries' University Research Program and will be taped out with GF 12nm FinFET  technology node. By integrating eFPGA technology into the StarRISC platform, researchers and engineers will be able to prototype and evaluate custom logic blocks, accelerators, and mission-specific algorithms on a radiation-tolerant device designed for space and high-reliability environments.

"STARR-Lab has worked with QuickLogic as members of the Open Hardware Group for several years," said Dr. Li Chen, Professor of Electrical and Computer Engineering and supervisor for the STARR Lab.  "We're excited to add eFPGA  capability to the next StarRISC Microcontroller, giving users the flexibility to explore new functions, accelerators, and ideas limited only by their imagination."

"The impressive work that Professor Chen and his team have done in creating a rad-tolerant RISC-V MCU with 22nm FDSOI node demonstrating no proton upsets and resilience to very high LET ions, aligns closely with QuickLogic's investment and focus in supporting the space community with eFPGA IP," said Mao Wang, senior director of product marketing at QuickLogic.  "We appreciate the STARR-Lab team choosing to incorporate our eFPGA Hard IP into their next design. This will give teams a new platform to experiment with custom logic on radiation-tolerant microcontroller."

QuickLogic can deliver eFPGA Hard IP on any new process node within four to six months, including radiation tolerant implementations, supporting applications from high-performance data processing to low-power, battery-operated devices. Once a fab-specific Hard IP is established, customer-specific variants can be delivered in just weeks, enabled by QuickLogic's proprietary Australis IP Generator. QuickLogic eFPGA IP is supported by two FPGA tool suites: Aurora, a 100% open-source version, and Aurora Pro, which integrates Synopsys® Synplify® FPGA Logic Synthesis.

For more information on QuickLogic's eFPGA IP licensing and other solutions, please visit www.quicklogic.com.

About STARR-Labs
The Semiconductor Technology and Rad-Effects Research Lab (STARR-Lab) is located at the University of Saskatchewan in Canada. We are a diverse group of students, researchers, and faculty who study radiation-effects in microelectronics, device reliabilty, and more. Our research group takes ideas from conception, through to design and implemenation, ending with real-world testing. Over the years we have collected a wealth of experience in semiconductor design and testing.

About QuickLogic 
QuickLogic Corporation is a fabless semiconductor company specializing in eFPGA Hard IP, discrete FPGAs, and endpoint AI solutions. QuickLogic's unique approach combines cutting-edge technology with open-source tools to deliver highly customizable, low-power solutions for industrial, aerospace, consumer, and computing markets. For more information, visit www.quicklogic.com. 

QuickLogic and logo are registered trademarks of QuickLogic. All other trademarks are the property of their respective holders and should be treated as such.

 

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SOURCE QuickLogic Corporation

FAQ

AI-generated questions and answers. How Rhea-AI works. Not financial advice.

What did QuickLogic (QUIK) announce on December 9, 2025 regarding the StarRISC MCU?

QuickLogic said its eFPGA Hard IP was selected to support personalization of the StarRISC rad-tolerant RISC-V microcontroller.

Which process node and foundry will tape out the StarRISC design using QUIK eFPGA?

The design is slated for tape-out on Globalfoundries 12nm FinFET technology.

How quickly can QuickLogic deliver fab-specific eFPGA Hard IP for new nodes?

QuickLogic stated it can deliver fab-specific eFPGA Hard IP in 4–6 months, with customer-specific variants in weeks.

What capabilities will QUIK's eFPGA add to the StarRISC microcontroller for space use?

It enables on-chip prototyping of custom logic blocks, accelerators, and mission-specific algorithms on a radiation-tolerant device.

Who is supporting the University of Saskatchewan STARR-Lab project with QUIK eFPGA?

The project is partially supported by Globalfoundries' University Research Program.

What FPGA toolchains support QuickLogic eFPGA IP for QUIK customers?

QuickLogic eFPGA IP is supported by Aurora (100% open-source) and Aurora Pro (integrates Synopsys Synplify).