Synopsys and Intel Foundry Accelerate Advanced Chip Designs with Synopsys IP and Certified EDA Flows for Intel 18A Process

Rhea-AI Summary

Synopsys collaborates with Intel Foundry to boost chipmakers' performance and speed to market. The partnership certifies EDA flows and optimizes IP for Intel 18A process, reducing integration risks and enabling multi-die system designs. Synopsys aids designers in developing high-performance chips, enhancing power and performance gains with backside routing. The company's comprehensive IP portfolio accelerates design execution and time to market for SoCs, while the 3DIC Compiler platform facilitates complex multi-die system needs.

Market Research Analyst

When assessing the collaboration between Synopsys and Intel Foundry, it is evident that the certification and optimization of EDA flows for Intel's 18A process represent a strategic move in the semiconductor industry. This partnership is likely to enhance Synopsys's competitive position, as it directly contributes to the performance and efficiency of chip design and production—a critical factor for the success of semiconductor companies.

The introduction of AI-driven EDA flows and a broad IP portfolio specifically for Intel's advanced process technology could lead to increased demand for Synopsys's services. This demand could potentially translate into higher revenue streams and market share expansion for Synopsys. Furthermore, the ability to optimize for power and area with Intel's PowerVIA backside routing and RibbonFET transistors implies that Synopsys is at the forefront of leveraging cutting-edge technological advancements.

From a market perspective, such advancements are crucial as they can significantly reduce time to market for new products, which is a key competitive advantage. Additionally, the Synopsys 3DIC Compiler's support for complex multi-die systems aligns with the industry's trend towards more sophisticated semiconductor designs, catering to the growing demand for high-performance computing and IoT devices.

Financial Analyst

The announcement of Synopsys's collaboration with Intel Foundry has several financial implications. Firstly, the optimization of EDA flows for the Intel 18A process could lead to operational efficiencies and cost savings for Synopsys, which may improve profit margins over time. The cost savings arise from the potential reduction in design and production times, as well as the likelihood of fewer errors and iterations in the chip manufacturing process.

Secondly, the development of a comprehensive IP portfolio for Intel's advanced processes may result in new licensing opportunities and recurring revenue for Synopsys. Intellectual property, especially in the semiconductor industry, is a significant asset that can provide long-term revenue streams. The ability to offer a differentiated and advanced IP portfolio can attract more customers, thus boosting sales.

Lastly, this collaboration is an indicator of Synopsys's strong market position and its ability to form strategic partnerships with industry leaders like Intel. Such collaborations can enhance investor confidence, potentially leading to a positive impact on Synopsys's stock price. However, investors should also consider the costs associated with the research and development of these advanced technologies, which could impact short-term financials.

Semiconductor Industry Expert

The collaboration between Synopsys and Intel Foundry is significant in the semiconductor industry, particularly due to the focus on the Intel 18A process technology. The 18A process represents one of the latest advancements in semiconductor manufacturing, aiming to provide superior power, performance and area (PPA) optimization. The adoption of PowerVIA and RibbonFET technologies indicates a move towards more efficient and high-density chip designs, which are essential for meeting the demands of modern electronics.

The Synopsys Analog QuickStart Kit and Custom Compiler PDK for Intel 18A are tools that could streamline the design process for analog components, which are notoriously complex and time-consuming to design. By simplifying this process, Synopsys is addressing a significant industry pain point, potentially leading to broader adoption of its design solutions.

Furthermore, the emphasis on multi-die system designs and the Synopsys 3DIC Compiler platform reflects the industry's transition to chiplet-based architectures. This transition is driven by the need for greater flexibility and scalability in semiconductor design, enabling manufacturers to mix and match different types of chiplets to create customized solutions for various applications. The ability to provide automated routing for UCIe interfaces and co-design with Intel's EMIB packaging technology is a testament to Synopsys's commitment to innovation and its role in shaping the future of semiconductor design.

Close Collaboration with EDA Flows and Broad IP Portfolio Enables Chipmakers to Boost Performance and Speed Time to Market

Highlights:

• Synopsys digital and analog EDA flows are certified and optimized to meet power, performance, and area targets on the Intel 18A process
• Broad portfolio of high-quality Synopsys IP reduces integration risk and accelerates time to market, providing a competitive edge to designers adopting the Intel 18A process
• Synopsys 3DIC Compiler, a unified exploration-to-signoff platform, enables multi-die system designs using Intel 18A and EMIB technologies

SUNNYVALE, Calif., Feb. 21, 2024 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today announced its AI-driven digital and analog design flows are certified by Intel Foundry for the Intel 18A process. In addition, through integration of high-quality Synopsys Foundation IP and Interface IP tuned for Intel Foundry technology, mutual customers can confidently design and deliver differentiated chips using advanced Intel Foundry technologies. With its certified EDA flows, multi-die system solution, and comprehensive IP portfolio in development for the Intel 18A process, Synopsys is helping designers accelerate the development of advanced high-performance designs. Today's announcement is being made at the Intel Foundry Direct Connect 2024 event, where Aart de Geus, Synopsys executive chair and founder, will present "Catalyzing SysMoore Together."

"The era of pervasive intelligence is driving significant silicon proliferation in the semiconductor industry, requiring strong ecosystem collaboration to help ensure customer success," said Shankar Krishnamoorthy, GM of the Synopsys EDA Group. "The AI-driven certified flows combined with the development of a broad Synopsys IP portfolio on the Intel 18A process, marks a significant milestone in our collaboration with Intel to help our mutual customers bring to life innovative devices, whether on the smallest processes or at angstrom scale."  

"Our longstanding, strategic collaboration with Synopsys provides designers with access to industry-leading certified EDA flows and IP that deliver the best performance, power, and area for the Intel 18A technology," said Rahul Goyal, Vice President and General Manager, Product and Design Ecosystem, Intel Foundry. "This milestone in our collaboration enables mutual customers to boost productivity with EDA flows, achieve the highest utilization, and accelerate development of their advanced designs on the Intel Foundry process."

Power and Performance Gains with Backside Routing 
Synopsys is working closely with Intel Foundry to enhance its EDA digital and analog design flows to help accelerate quality of results and time to results, while optimizing Synopsys IP and EDA flows for power and area on the Intel 18A process to take advantage of Intel's PowerVIA backside routing and RibbonFET transistors. The Intel 18A process technology is optimized using Synopsys design technology co-optimization tools to provide enhanced power, performance, and area. In addition, Synopsys Analog QuickStart Kit (QSK) and Synopsys Custom Compiler process design kit (PDK) for Intel 18A deliver proven methodologies for higher quality design and fast turnaround times.

To realize the advantages of the Intel 18A process and to bring differentiated products to market, Intel Foundry customers can integrate a comprehensive Synopsys IP portfolio built for Intel advanced process technologies. Synopsys will enable a range of its industry-leading interface and foundation IP to accelerate design execution and time to market for SoCs. 

Synopsys and Intel Foundry are also driving multi-die systems forward with Synopsys 3DIC Compiler platform and Intel's advanced foundry processes. The platform addresses Intel Foundry chip designers' most complex multi-die system needs and provides automated routing for UCIe interfaces, while allowing seamless co-design of Intel's EMIB packaging technology. The Synopsys Multi-Die System Solution enables early architecture exploration, rapid software development and system validation, efficient die and package co-design, robust and secure die-to-die connectivity, and enhanced manufacturing and reliability. 

Availability and Resources 
The Synopsys Digital Design Family and Synopsys Custom Design Family tools are available now for advanced Intel Foundry processes. In addition, a broad portfolio of Synopsys IP for Intel 18A is in development.

• Learn more about the Synopsys Digital Design Family: https://www.synopsys.com/implementation-and-signoff/fusion-design-platform.html
• Learn more about the Synopsys Custom Design Family: https://www.synopsys.com/implementation-and-signoff/custom-design-platform.html
• Learn more about Synopsys IP: https://www.synopsys.com/designware-ip.html
• Learn more about the Synopsys Multi-Die System Solution: https://www.synopsys.com/multi-die-system.html

About Synopsys
Catalyzing the era of pervasive intelligence, Synopsys, Inc. (Nasdaq: SNPS) delivers trusted and comprehensive silicon to systems design solutions, from electronic design automation to silicon IP and system verification and validation. We partner closely with semiconductor and systems customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.  Learn more at www.synopsys.com. 

Editorial Contact:

Kelli Wheeler 
Synopsys, Inc. 
(518) 248-0780
kelliw@synopsys.com 
corp-pr@synopsys.com 

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SOURCE Synopsys, Inc.

What process is Synopsys collaborating with Intel Foundry on?

Synopsys is collaborating with Intel Foundry on the Intel 18A process.

What is the significance of Synopsys' EDA flows being certified by Intel Foundry?

The certification allows mutual customers to confidently design and deliver differentiated chips using advanced Intel Foundry technologies.

How does Synopsys aid designers in accelerating the development of advanced high-performance designs?

Synopsys aids designers with certified EDA flows, multi-die system solution, and a comprehensive IP portfolio in development for the Intel 18A process.

What does Synopsys offer to enhance power and performance gains with backside routing on the Intel 18A process?

Synopsys optimizes its IP and EDA flows for power and area on the Intel 18A process, taking advantage of Intel's PowerVIA backside routing and RibbonFET transistors.

How does Synopsys enable Intel Foundry customers to accelerate design execution and time to market for SoCs?

Synopsys provides a range of industry-leading interface and foundation IP to accelerate design execution and time to market for SoCs built for Intel advanced process technologies.

What solution does Synopsys offer for driving multi-die systems forward with Intel's advanced foundry processes?

Synopsys offers the 3DIC Compiler platform to address Intel Foundry chip designers' most complex multi-die system needs and provide automated routing for UCIe interfaces.