Welcome to our dedicated page for Navitas Semiconductor news (Ticker: NVTS), a resource for investors and traders seeking the latest updates and insights on Navitas Semiconductor stock.
Navitas Semiconductor Corporation develops next-generation power semiconductors built around gallium nitride and silicon carbide technologies. Its GaNFast power ICs integrate GaN power, drive, control, sensing and protection functions, while GeneSiC devices serve high-voltage SiC power applications. Company updates frequently address AI data centers, performance computing, energy and grid infrastructure, industrial electrification, e-mobility, telecommunications and fast-charging markets.
Recurring Navitas news covers financial results, the company’s shift toward high-power markets, product platforms such as DC-DC power delivery boards, technology licensing and supply-chain partnerships, and governance changes including finance leadership and board appointments.
Navitas Semiconductor (NVTS) will participate in the Citi 2026 Global TMT Conference at the New York Hilton Midtown Hotel. The company’s President and CEO, Chris Allexandre, and CFO, Tonya Stevens, will host a fireside chat at 1:15 p.m. Eastern Time on Tuesday, September 8, 2026.
A live and archived audio webcast of the fireside chat will be accessible in the Events section of Navitas’ Investor Relations website. Portfolio managers and analysts can request meetings with management through their Citi representative.
Navitas Semiconductor (Nasdaq: NVTS) announced that first shipments of its U.S.-manufactured 5th Generation GaNFast™ power semiconductors, produced in partnership with GlobalFoundries, will begin in September 2026. The devices are manufactured on GF’s 200 mm GaN-on-silicon line in Burlington, Vermont.
The long-term strategic partnership, initiated in November 2025, combines Navitas’ proprietary GaNFast technology and over 300 issued and pending GaN/SiC patents with GF’s high-volume U.S. production capabilities to provide a trusted domestic supply of advanced GaN power semiconductors for AI infrastructure, high-performance computing, industrial electrification, and critical national security applications.
The initial Gen 5 GaNFast family is expected to include 650 V GaN FETs with RDS(ON) options of 11mΩ, 18mΩ, 50mΩ, 120mΩ, and 150mΩ, with first wafers shipping in September, internal samples in October, and strategic customer samples targeted before year-end.
Navitas (Nasdaq: NVTS) signed a definitive agreement to acquire power‑management firm Claros, which develops vertical power delivery (VPD) and integrated voltage regulator (IVR) technology for next‑generation AI data centers. The transaction is valued at up to approximately $232.8 million, based on Navitas’ August 21, 2026 share price.
According to Navitas, the deal is expected to complete its grid‑to‑xPU high‑power portfolio, enabling power conversion from ultra‑high‑voltage grid down to AI processors. The acquisition is projected to more than double Navitas’ 2030 serviceable addressable market to over $8 billion. Boards of both companies unanimously approved the deal, which is expected to close before year‑end 2026, subject to regulatory and other customary conditions. Navitas expects revenue acceleration and margin expansion from 2028/2029 onward, while maintaining its current path to profitability under the Navitas 2.0 strategy.
Navitas Semiconductor (Nasdaq: NVTS) announced participation in three upcoming investor conferences, where it will also host one-on-one meetings with portfolio managers and analysts. The company will join the virtual Rosenblatt Technology Summit: The Age of AI on August 18, 2026, the Jefferies Semiconductor, IT Hardware & Communications Technology Conference in Chicago on August 25, 2026, and the Deutsche Bank Technology Conference in Dana Point, California on August 27, 2026. Meetings with Navitas management can be requested through sales representatives at the respective hosting firms.
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Navitas Semiconductor (Nasdaq: NVTS) reported unaudited second quarter 2026 revenue of $10.5 million, up 22% sequentially from Q1 but below $14.5 million in Q2 2025. High-power markets grew more than 50% year-over-year, supporting the company’s Navitas 2.0 shift away from mobile and low-end consumer toward AI infrastructure, grid and energy applications.
GAAP gross margin was 0.4%, including roughly $4 million of intangible amortization, while non-GAAP gross margin improved to 39.5%. GAAP net loss reached $228.2 million due largely to a $203.1 million non-cash earnout remeasurement; non-GAAP net loss was $9.3 million. Cash and equivalents rose to $557.4 million.
For Q3 2026, Navitas guides revenue to $13.5 million ± $0.5 million (about 28% sequential growth), non-GAAP gross margin around 39.7%, and non-GAAP operating expenses of $15.5–$17.5 million, expecting a return to year-over-year revenue growth and continued high-power mix expansion.
Navitas Semiconductor (Nasdaq: NVTS) and Magnachip Semiconductor (NYSE: MX) announced a strategic partnership to accelerate adoption of silicon carbide (SiC) in high-voltage and ultra-high-voltage power markets. Magnachip will license Navitas’ GeneSiC Gen 4 and Gen 5 Trench-Assisted Planar (TAP) SiC technologies covering 1200 V, 2300 V, 3300 V and higher.
Magnachip gains access to Navitas’ SiC supply chain and materials ecosystem, with the technology planned to be ported, qualified and internalized at Magnachip’s fab in South Korea. According to Navitas, the licensed platforms target next-generation energy and grid infrastructure, energy storage, industrial electrification, automotive and other high-power systems, with broader collaboration beyond SiC expected to be detailed later.
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Navitas Semiconductor (Nasdaq: NVTS) will report Q2 2026 financial results on Monday, July 27, 2026, after market close.
President and CEO Chris Allexandre and CFO Tonya Stevens will host a conference call at 2:00 p.m. Pacific Time for analysts and investors, with a live and archived webcast via the Investor Relations website.
Navitas Semiconductor (Nasdaq: NVTS) introduced the UHV-TO-247-4-ISO isolated through-hole package for GeneSiC SiC MOSFETs from 1200 V to 3300 V.
The package offers >6000 V integrated isolation, >12 mm creepage, direct-cooled reflow-compatible thermal pad, up to 60% lower RTH,J-HS and up to 150% higher power dissipation capability.